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xtensa: add support for the xtensa processor architecture [1/2]

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The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.

This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers will be in separate commits.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Chris Zankel 2016-08-10 18:36:43 +03:00 • committed by Tom Rini
parent f225d39d30
commit de5e5cea02
9 changed files with 179 additions and 6 deletions
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47
examples/standalone/stubs.c
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@ -240,6 +240,53 @@ gd_t *global_data;
" ld r10, [r10, %1]\n" \
" j [r10]\n" \
: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r10");
#elif defined(CONFIG_XTENSA)
/*
* Global data ptr is in global_data, jump table ptr is in jt.
* Windowed ABI: Jump just past 'entry' in target and adjust stack frame
* (extract stack frame size from target 'entry' instruction).
*/
static void **jt;
#if defined(__XTENSA_CALL0_ABI__)
#define EXPORT_FUNC(f, a, x, ...) \
asm volatile ( \
" .extern jt\n" \
" .globl " #x "\n" \
" .align 4\n" \
#x ":\n" \
" l32i a8, %0, 0\n" \
" l32i a8, a8, %1\n" \
" jx a8\n" \
: : "r"(jt), "i" (FO(x)) : "a8");
#elif defined(__XTENSA_WINDOWED_ABI__)
#if XCHAL_HAVE_BE
# define SFT "8"
#else
# define SFT "12"
#endif
#define EXPORT_FUNC(f, a, x, ...) \
asm volatile ( \
" .extern jt\n" \
" .globl " #x "\n" \
" .align 4\n" \
#x ":\n" \
" entry sp, 16\n" \
" l32i a8, %0, 0\n" \
" l32i a8, a8, %1\n" \
" l32i a9, a8, 0\n" \
" extui a9, a9, " SFT ", 12\n" \
" subx8 a9, a9, sp\n" \
" movi a10, 16\n" \
" sub a9, a10, a9\n" \
" movsp sp, a9\n" \
" addi a8, a8, 3\n" \
" jx a8\n" \
: : "r"(jt), "i" (FO(x)) : "a8", "a9", "a10");
#else
#error Unsupported Xtensa ABI
#endif
#else
/*" addi $sp, $sp, -24\n" \
" br $r16\n" \*/