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ppc4xx: Remove ML2 board support

Browse source 
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter De Schrijver <p2@mind.be>
Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Stefan Roese 2012-09-19 15:18:51 +02:00 • committed by Tom Rini
parent 99bcad1809
commit dee9c534db
11 changed files with 1 additions and 1067 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
MAINTAINERS
View file

@ -454,10 +454,6 @@ Heiko Schocher <hs@denx.de>
uc101 MPC5200
ve8313 MPC8313
Peter De Schrijver <p2@mind.be>
ML2 PPC4xx
Andre Schwarz <andre.schwarz@matrix-vision.de>
mergerbox MPC8377

2
arch/powerpc/include/asm/ppc4xx.h
View file

@ -86,7 +86,7 @@
/*
* Configure which SDRAM/DDR/DDR2 controller is equipped
*/
#if defined(CONFIG_AP1000) || defined(CONFIG_ML2)
#if defined(CONFIG_AP1000)
#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
#endif

45
board/ml2/Makefile
View file

@ -1,45 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o flash.o serial.o
SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

300
board/ml2/flash.c
View file

@ -1,300 +0,0 @@
/*
* flash.c: Support code for the flash chips on the Xilinx ML2 board
*
* Copyright 2002 Mind NV
*
* http://www.mind.be/
*
* Author : Peter De Schrijver (p2@mind.be)
*
* This software may be used and distributed according to the terms of
* the GNU General Public License (GPL) version 2, incorporated herein by
* reference. Drivers based on or derived from this code fall under the GPL
* and must retain the authorship, copyright and this license notice. This
* file is not a complete program and may only be used when the entire program
* is licensed under the GPL.
*
*/
#include <common.h>
#include <asm/u-boot.h>
#include <configs/ML2.h>
#define FLASH_BANK_SIZE (64*1024*1024)
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
#define SECT_SIZE (512*1024)
#define CMD_READ_ARRAY 0x00FF00FF00FF00FULL
#define CMD_IDENTIFY 0x0090009000900090ULL
#define CMD_ERASE_SETUP 0x0020002000200020ULL
#define CMD_ERASE_CONFIRM 0x00D000D000D000D0ULL
#define CMD_PROGRAM 0x0040004000400040ULL
#define CMD_RESUME 0x00D000D000D000D0ULL
#define CMD_SUSPEND 0x00B000B000B000B0ULL
#define CMD_STATUS_READ 0x0070007000700070ULL
#define CMD_STATUS_RESET 0x0050005000500050ULL
#define BIT_BUSY 0x0080008000800080ULL
#define BIT_ERASE_SUSPEND 0x004000400400040ULL
#define BIT_ERASE_ERROR 0x0020002000200020ULL
#define BIT_PROGRAM_ERROR 0x0010001000100010ULL
#define BIT_VPP_RANGE_ERROR 0x0008000800080008ULL
#define BIT_PROGRAM_SUSPEND 0x0004000400040004ULL
#define BIT_PROTECT_ERROR 0x0002000200020002ULL
#define BIT_UNDEFINED 0x0001000100010001ULL
#define BIT_SEQUENCE_ERROR 0x0030003000300030ULL
#define BIT_TIMEOUT 0x80000000
inline void eieio(void) {
__asm__ __volatile__ ("eieio" : : : "memory");
}
ulong flash_init(void) {
int i, j;
ulong size = 0;
for(i=0;i<CONFIG_SYS_MAX_FLASH_BANKS;i++) {
ulong flashbase = 0;
flash_info[i].flash_id = (INTEL_MANUFACT & FLASH_VENDMASK) |
(INTEL_ID_28F128J3A & FLASH_TYPEMASK);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
if (i==0)
flashbase = CONFIG_SYS_FLASH_BASE;
else
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
flash_info[i].start[j]=flashbase + j * SECT_SIZE;
size += flash_info[i].size;
}
return size;
}
void flash_print_info (flash_info_t *info) {
int i;
switch (info->flash_id & FLASH_VENDMASK) {
case (INTEL_MANUFACT & FLASH_VENDMASK):
printf("Intel: ");
break;
default:
printf("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case (INTEL_ID_28F128J3A & FLASH_TYPEMASK):
printf("4x 28F128J3A (128Mbit)\n");
break;
default:
printf("Unknown Chip Type\n");
break;
}
printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
printf(" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++) {
if ((i % 5) == 0)
printf("\n ");
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
}
int flash_error (unsigned long long code) {
if (code & BIT_TIMEOUT) {
printf ("Timeout\n");
return ERR_TIMOUT;
}
if (~code & BIT_BUSY) {
printf ("Busy\n");
return ERR_PROG_ERROR;
}
if (code & BIT_VPP_RANGE_ERROR) {
printf ("Vpp range error\n");
return ERR_PROG_ERROR;
}
if (code & BIT_PROTECT_ERROR) {
printf ("Device protect error\n");
return ERR_PROG_ERROR;
}
if (code & BIT_SEQUENCE_ERROR) {
printf ("Command seqence error\n");
return ERR_PROG_ERROR;
}
if (code & BIT_ERASE_ERROR) {
printf ("Block erase error\n");
return ERR_PROG_ERROR;
}
if (code & BIT_PROGRAM_ERROR) {
printf ("Program error\n");
return ERR_PROG_ERROR;
}
if (code & BIT_ERASE_SUSPEND) {
printf ("Block erase suspended\n");
return ERR_PROG_ERROR;
}
if (code & BIT_PROGRAM_SUSPEND) {
printf ("Program suspended\n");
return ERR_PROG_ERROR;
}
return ERR_OK;
}
int flash_erase (flash_info_t *info, int s_first, int s_last) {
int rc = ERR_OK;
int sect;
unsigned long long result;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last))
return ERR_INVAL;
if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
return ERR_UNKNOWN_FLASH_VENDOR;
for (sect=s_first; sect<=s_last; ++sect)
if (info->protect[sect])
return ERR_PROTECTED;
for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
volatile unsigned long long *addr=
(unsigned long long *)(info->start[sect]);
printf("Erasing sector %2d ... ", sect);
*addr=CMD_STATUS_RESET;
eieio();
*addr=CMD_ERASE_SETUP;
eieio();
*addr=CMD_ERASE_CONFIRM;
eieio();
do {
result = *addr;
} while(~result & BIT_BUSY);
*addr=CMD_READ_ARRAY;
if ((rc = flash_error(result)) == ERR_OK)
printf("ok.\n");
else
break;
}
if (ctrlc())
printf("User Interrupt!\n");
return rc;
}
static int write_word (flash_info_t *info, ulong dest, unsigned long long data) {
volatile unsigned long long *addr=(unsigned long long *)dest;
unsigned long long result;
int rc = ERR_OK;
result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
*addr=CMD_STATUS_RESET;
eieio();
*addr=CMD_PROGRAM;
eieio();
*addr=data;
eieio();
do {
result = *addr;
} while(~result & BIT_BUSY);
*addr=CMD_READ_ARRAY;
rc = flash_error(result);
return rc;
}
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
ulong cp, wp;
unsigned long long data;
int l;
int i,rc;
wp=(addr & ~7);
if((l=addr-wp) != 0) {
data=0;
for(i=0,cp=wp;i<l;++i,++cp)
data = (data >> 8) | (*(uchar *)cp << 24);
for (; i<8 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 24);
--cnt;
++cp;
}
for (; i<8; ++i, ++cp)
data = (data >> 8) | (*(uchar *)cp << 24);
if ((rc = write_word(info, wp, data)) != 0)
return rc;
wp+=8;
}
while(cnt>=8) {
data = *((unsigned long long *)src);
if ((rc = write_word(info, wp, data)) != 0)
return rc;
src+=8;
wp+=8;
cnt-=8;
}
if(cnt == 0)
return ERR_OK;
data = 0;
for (i=0, cp=wp; i<8 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 24);
--cnt;
}
for (; i<8; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
}
return write_word(info, wp, data);
}

30
board/ml2/init.S
View file

@ -1,30 +0,0 @@
/*
* init.S: Stubs for U-Boot initialization
*
* Copyright 2002 Mind NV
*
* http://www.mind.be/
*
* Author : Peter De Schrijver (p2@mind.be)
*
* This software may be used and distributed according to the terms of
* the GNU General Public License (GPL) version 2, incorporated herein by
* reference. Drivers based on or derived from this code fall under the GPL
* and must retain the authorship, copyright and this license notice. This
* file is not a complete program and may only be used when the entire
* program is licensed under the GPL.
*
*/
#include <asm/ppc4xx.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
#include <asm/mmu.h>
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
blr

62
board/ml2/ml2.c
View file

@ -1,62 +0,0 @@
/*
* ml2.c: U-Boot platform support for Xilinx ML2 board
*
* Copyright 2002 Mind NV
*
* http://www.mind.be/
*
* Author : Peter De Schrijver (p2@mind.be)
*
* Derived from : Other platform support files in this tree
*
* This software may be used and distributed according to the terms of
* the GNU General Public License (GPL) version 2, incorporated herein by
* reference. Drivers based on or derived from this code fall under the GPL
* and must retain the authorship, copyright and this license notice. This
* file is not a complete program and may only be used when the entire
* program is licensed under the GPL.
*
*/
#include <common.h>
#include <asm/processor.h>
int board_early_init_f (void)
{
return 0;
}
int checkboard (void)
{
char buf[64];
int i;
int l = getenv_f("serial#", buf, sizeof(buf));
if (l < 0 || strncmp(buf, "ML2", 9)) {
printf ("### No HW ID - assuming ML2");
} else {
for (i = 0; i < l; i++) {
if (buf[i] == ' ')
break;
putc(buf[i]);
}
}
putc ('\n');
return (0);
}
phys_size_t initdram (int board_type)
{
return 32 * 1024 * 1024;
}
int testdram (void)
{
printf ("test: xxx MB - ok\n");
return (0);
}

138
board/ml2/serial.c
View file

@ -1,138 +0,0 @@
/*
* (C) Copyright 2002
* Peter De Schrijver (p2@mind.be), Mind Linux Solutions, NV.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/u-boot.h>
#include <asm/processor.h>
#include <command.h>
#include <configs/ML2.h>
#include <serial.h>
#include <linux/compiler.h>
#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2)
#include <ns16550.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2)
const NS16550_t COM_PORTS[] = { (NS16550_t) CONFIG_SYS_NS16550_COM1,
(NS16550_t) CONFIG_SYS_NS16550_COM2
};
#endif
static int ml2_serial_init(void)
{
int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate;
#ifdef CONFIG_SYS_INIT_CHAN1
(void) NS16550_init (COM_PORTS[0], clock_divisor);
#endif
#ifdef CONFIG_SYS_INIT_CHAN2
(void) NS16550_init (COM_PORTS[1], clock_divisor);
#endif
return 0;
}
static void ml2_serial_putc(const char c)
{
if (c == '\n')
NS16550_putc (COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r');
NS16550_putc (COM_PORTS[CONFIG_SYS_DUART_CHAN], c);
}
static int ml2_serial_getc(void)
{
return NS16550_getc (COM_PORTS[CONFIG_SYS_DUART_CHAN]);
}
static int ml2_serial_tstc(void)
{
return NS16550_tstc (COM_PORTS[CONFIG_SYS_DUART_CHAN]);
}
static void ml2_serial_setbrg(void)
{
int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate;
#ifdef CONFIG_SYS_INIT_CHAN1
NS16550_reinit (COM_PORTS[0], clock_divisor);
#endif
#ifdef CONFIG_SYS_INIT_CHAN2
NS16550_reinit (COM_PORTS[1], clock_divisor);
#endif
}
static void ml2_serial_puts(const char *s)
{
while (*s) {
serial_putc (*s++);
}
}
static struct serial_device ml2_serial_drv = {
.name = "ml2_serial",
.start = ml2_serial_init,
.stop = NULL,
.setbrg = ml2_serial_setbrg,
.putc = ml2_serial_putc,
.puts = ml2_serial_puts,
.getc = ml2_serial_getc,
.tstc = ml2_serial_tstc,
};
void ml2_serial_initialize(void)
{
serial_register(&ml2_serial_drv);
}
__weak struct serial_device *default_serial_console(void)
{
return &ml2_serial_drv;
}
#if defined(CONFIG_CMD_KGDB)
void kgdb_serial_init (void)
{
}
void putDebugChar (int c)
{
serial_putc (c);
}
void putDebugStr (const char *str)
{
serial_puts (str);
}
int getDebugChar (void)
{
return serial_getc ();
}
void kgdb_interruptible (int yes)
{
return;
}
#endif

94
board/ml2/u-boot.lds
View file

@ -1,94 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.text :
{
*(.text*)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
_GOT2_TABLE_ = .;
KEEP(*(.got2))
KEEP(*(.got))
PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
_FIXUP_TABLE_ = .;
KEEP(*(.fixup))
}
__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data*)
*(.sdata*)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(4);
}
__bss_end__ = . ;
PROVIDE (end = .);
}

135
board/ml2/u-boot.lds.debug
View file

@ -1,135 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib/vsprintf.o (.text)
lib/crc32.o (.text)
arch/powerpc/lib/extable.o (.text)
common/env_embedded.o(.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
*(.eh_frame)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
__bss_end__ = . ;
PROVIDE (end = .);
}

1
boards.cfg
View file

@ -956,7 +956,6 @@ JSE powerpc ppc4xx jse
korat powerpc ppc4xx
korat_perm powerpc ppc4xx korat - - korat:KORAT_PERMANENT
lwmon5 powerpc ppc4xx
ML2 powerpc ppc4xx ml2
pcs440ep powerpc ppc4xx
quad100hd powerpc ppc4xx
sbc405 powerpc ppc4xx

257
include/configs/ML2.h
View file

@ -1,257 +0,0 @@
/*
* ML2.h: ML2 specific config options
*
* Copyright 2002 Mind NV
*
* http://www.mind.be/
*
* Author : Peter De Schrijver (p2@mind.be)
*
* Derived from : other configuration header files in this tree
*
* This software may be used and distributed according to the terms of
* the GNU General Public License (GPL) version 2, incorporated herein by
* reference. Drivers based on or derived from this code fall under the GPL
* and must retain the authorship, copyright and this license notice. This
* file is not a complete program and may only be used when the entire
* program is licensed under the GPL.
*
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_405 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_ML2 1 /* ...on a ML2 board */
#define CONFIG_SYS_TEXT_BASE 0x18000000
#define CONFIG_SYS_LDSCRIPT "board/ml2/u-boot.lds"
#define CONFIG_ENV_IS_IN_FLASH 1
#ifdef CONFIG_ENV_IS_IN_NVRAM
#undef CONFIG_ENV_IS_IN_FLASH
#else
#ifdef CONFIG_ENV_IS_IN_FLASH
#undef CONFIG_ENV_IS_IN_NVRAM
#endif
#endif
#define CONFIG_BAUDRATE 9600
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
#if 1
#define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */
#else
#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
#endif
#define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
#if 0
#define CONFIG_BOOTARGS "root=/dev/nfs " \
"ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
"nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4"
#else
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \
"console=ttyS0 console=tty"
#endif
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_KGDB
#define CONFIG_CMD_BEDBUG
#define CONFIG_CMD_ELF
#define CONFIG_CMD_JFFS2
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_RTC
#undef CONFIG_CMD_PCI
#undef CONFIG_CMD_I2C
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SYS_CLK_FREQ 50000000
#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
/*
* I2C
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_SPEED 400000
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
/*
* If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
* If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
* Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
* The Linux BASE_BAUD define should match this configuration.
* baseBaud = cpuClock/(uartDivisor*16)
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD (3125000*16)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD
#define CONFIG_SYS_DUART_CHAN 0
#define CONFIG_SYS_NS16550_COM1 0xa0001003
#define CONFIG_SYS_NS16550_COM2 0xa0011003
#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550 1
#define CONFIG_SYS_INIT_CHAN1 1
#define CONFIG_SYS_INIT_CHAN2 1
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0x18000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
/* BEG ENVIRONNEMENT FLASH */
#ifdef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */
#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
#endif
/* END ENVIRONNEMENT FLASH */
/*-----------------------------------------------------------------------
* NVRAM organization
*/
#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
#define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
#ifdef CONFIG_ENV_IS_IN_NVRAM
#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
#define CONFIG_ENV_ADDR \
(CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
#endif
/*
* Init Memory Controller:
*
* BR0/1 and OR0/1 (FLASH)
*/
#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
/* Configuration Port location */
#define CONFIG_PORT_ADDR 0xF0000500
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Definitions for Serial Presence Detect EEPROM address
* (to get SDRAM settings)
*/
#define SPD_EEPROM_ADDRESS 0x50
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* JFFS2 partitions
*
*/
/* No command line, one static partition, whole device */
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_JFFS2_DEV "nor0"
#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
#define CONFIG_JFFS2_PART_OFFSET 0x00080000
/* mtdparts command line support */
/* Note: fake mtd_id used, no linux mtd map file */
/*
#define CONFIG_CMD_MTDPARTS
#define MTDIDS_DEFAULT "nor0=ml2-0"
#define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)"
*/
#endif /* __CONFIG_H */