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rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight . And Enable rk808 for lcd_3v3 in another patch. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This commit is contained in:
Eric Gao
Simon Glass
parent
028d684901
commit
df8fe99cf2
2 changed files with 148 additions and 0 deletions
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@ -66,6 +66,59 @@
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clock-output-names = "clkin_gmac";
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clock-output-names = "clkin_gmac";
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#clock-cells = <0>;
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#clock-cells = <0>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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power-supply = <&vccsys>;
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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pwms = <&pwm0 0 25000 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0_pin>;
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pwm-delay-us = <10000>;
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status = "disabled";
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};
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panel:panel {
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compatible = "simple-panel";
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power-supply = <&vcc33_lcd>;
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backlight = <&backlight>;
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/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
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status = "disabled";
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};
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};
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};
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&emmc_phy {
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&emmc_phy {
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@ -148,6 +201,7 @@
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status = "okay";
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status = "okay";
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vcc12-supply = <&vcc3v3_sys>;
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vcc12-supply = <&vcc3v3_sys>;
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regulators {
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regulators {
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vcc33_lcd: SWITCH_REG2 {
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vcc33_lcd: SWITCH_REG2 {
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regulator-always-on;
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regulator-always-on;
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@ -158,6 +212,29 @@
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};
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};
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};
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};
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&mipi_dsi {
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status = "disabled";
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rockchip,panel = <&panel>;
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display-timings {
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timing0 {
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bits-per-pixel = <24>;
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clock-frequency = <160000000>;
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hfront-porch = <120>;
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hsync-len = <20>;
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hback-porch = <21>;
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hactive = <1200>;
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vfront-porch = <21>;
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vsync-len = <3>;
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vback-porch = <18>;
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vactive = <1920>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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&pinctrl {
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&pinctrl {
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pmic {
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pmic {
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pmic_int_l: pmic-int-l {
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pmic_int_l: pmic-int-l {
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@ -1402,6 +1402,77 @@
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status = "disabled";
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status = "disabled";
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};
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};
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vopl: vop@ff8f0000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-vop-lit";
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reg = <0x0 0xff8f0000 0x0 0x3efc>;
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interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
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reset-names = "axi", "ahb", "dclk";
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status = "disabled";
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vopl_out: port {
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#address-cells = <1>;
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#size-cells = <0>;
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vopl_out_mipi: endpoint@0 {
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reg = <3>;
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remote-endpoint = <&mipi_in_vopl>;
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};
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};
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};
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vopb: vop@ff900000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-vop-big";
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reg = <0x0 0xff900000 0x0 0x3efc>;
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interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
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#clock-cells = <0>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
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reset-names = "axi", "ahb", "dclk";
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status = "disabled";
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vopb_out: port {
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#address-cells = <1>;
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#size-cells = <0>;
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vopb_out_mipi: endpoint@0 {
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reg = <3>;
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remote-endpoint = <&mipi_in_vopb>;
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};
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};
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};
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mipi_dsi: mipi@ff960000 {
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compatible = "rockchip,rk3399_mipi_dsi";
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reg = <0x0 0xff960000 0x0 0x8000>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
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<&cru SCLK_DPHY_TX0_CFG>;
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clock-names = "ref", "pclk", "phy_cfg";
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rockchip,grf = <&grf>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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mipi_in: port {
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_vopb: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vopb_out_mipi>;
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};
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mipi_in_vopl: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vopl_out_mipi>;
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};
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};
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};
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};
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pinctrl: pinctrl {
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pinctrl: pinctrl {
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u-boot,dm-pre-reloc;
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-pinctrl";
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compatible = "rockchip,rk3399-pinctrl";
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