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arm64: zynqmp: Provide a Kconfig option to use specified memory for MMU table

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This patch provides a Kconfig option to use specified
memory for MMU table using reserve_mmu platform specific
routine. Here we used TCM space for MMU table.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Siva Durga Prasad Paladugu 2017-07-13 19:01:11 +05:30 • committed by Michal Simek
parent f322ad604e
commit e042d36e17
3 changed files with 22 additions and 0 deletions
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7
arch/arm/cpu/armv8/zynqmp/Kconfig
View file

@ -42,6 +42,13 @@ config SYS_CONFIG_NAME
Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
will be used for board configuration. will be used for board configuration.
config SYS_MEM_RSVD_FOR_MMU
bool "Reserve memory for MMU Table"
help
If defined this option is used to setup different space for
MMU table than the one which will be allocated during
relocation.
config BOOT_INIT_FILE config BOOT_INIT_FILE
string "boot.bin init register filename" string "boot.bin init register filename"
depends on SPL depends on SPL

12
arch/arm/cpu/armv8/zynqmp/cpu.c
View file

@ -77,6 +77,18 @@ u64 get_page_table_size(void)
return 0x14000; return 0x14000;
} }
#ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
int reserve_mmu(void)
{
initialize_tcm(TCM_LOCK);
memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE);
gd->arch.tlb_size = PGTABLE_SIZE;
gd->arch.tlb_addr = ZYNQMP_TCM_BASE_ADDR;
return 0;
}
#endif
static unsigned int zynqmp_get_silicon_version_secure(void) static unsigned int zynqmp_get_silicon_version_secure(void)
{ {
u32 ver; u32 ver;

3
arch/arm/include/asm/arch-zynqmp/hardware.h
View file

@ -21,6 +21,9 @@
#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000 #define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000 #define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000
#define ZYNQMP_TCM_BASE_ADDR 0xFFE00000
#define ZYNQMP_TCM_SIZE 0x40000
#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000 #define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000
#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000
#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT 0 #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT 0