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ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi

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Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
Patrice Chotard 2021-11-15 11:39:17 +01:00
parent e447a18095
commit e114ddc385
1 changed files with 3 additions and 3 deletions
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6
arch/arm/dts/stm32f469-disco-u-boot.dtsi
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@ -34,7 +34,7 @@
fmc: fmc@A0000000 { fmc: fmc@A0000000 {
compatible = "st,stm32-fmc"; compatible = "st,stm32-fmc";
reg = <0xA0000000 0x1000>; reg = <0xa0000000 0x1000>;
clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>;
st,syscfg = <&syscfg>; st,syscfg = <&syscfg>;
pinctrl-0 = <&fmc_pins_d32>; pinctrl-0 = <&fmc_pins_d32>;
@ -70,7 +70,7 @@
compatible = "st,stm32f469-qspi"; compatible = "st,stm32f469-qspi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>;
reg-names = "qspi", "qspi_mm"; reg-names = "qspi", "qspi_mm";
interrupts = <91>; interrupts = <91>;
spi-max-frequency = <108000000>; spi-max-frequency = <108000000>;
@ -236,7 +236,7 @@
}; };
&qspi { &qspi {
reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>; reg = <0xa0001000 0x1000>, <0x90000000 0x1000000>;
flash0: n25q128a@0 { flash0: n25q128a@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;