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sparc: Initial ground work for generic board initialization
Initial ground work in preperation for generic board initialization code for the SPARC architecture. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
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9 changed files with 43 additions and 26 deletions
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@ -97,6 +97,7 @@ config SH
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config SPARC
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config SPARC
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bool "SPARC architecture"
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bool "SPARC architecture"
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select HAVE_GENERIC_BOARD
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select CREATE_ARCH_SYMLINK
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select CREATE_ARCH_SYMLINK
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config X86
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config X86
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@ -1,7 +1,7 @@
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/* CPU specific code for the LEON2 CPU
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/* CPU specific code for the LEON2 CPU
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*
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*
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* (C) Copyright 2007
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* (C) Copyright 2007, 2015
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+
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*/
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*/
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@ -1,8 +1,8 @@
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/* Initializes CPU and basic hardware such as memory
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/* Initializes CPU and basic hardware such as memory
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* controllers, IRQ controller and system timer 0.
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* controllers, IRQ controller and system timer 0.
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*
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*
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* (C) Copyright 2007
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* (C) Copyright 2007, 2015
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+
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*/
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*/
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@ -18,14 +18,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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/* reset CPU (jump to 0, without reset) */
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void start(void);
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struct {
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gd_t gd_area;
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bd_t bd;
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} global_data;
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/*
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/*
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* Breath some life into the CPU...
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* Breath some life into the CPU...
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*
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*
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@ -69,6 +61,15 @@ void cpu_init_f2(void)
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}
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}
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int arch_cpu_init(void)
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{
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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gd->bus_clk = CONFIG_SYS_CLK_FREQ;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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/*
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/*
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* initialize higher level parts of CPU like time base and timers
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* initialize higher level parts of CPU like time base and timers
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*/
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*/
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@ -1,7 +1,7 @@
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/* CPU specific code for the LEON3 CPU
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/* CPU specific code for the LEON3 CPU
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*
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*
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* (C) Copyright 2007
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* (C) Copyright 2007, 2015
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+
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*/
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*/
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@ -27,19 +27,11 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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/* reset CPU (jump to 0, without reset) */
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void start(void);
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ambapp_dev_irqmp *irqmp = NULL;
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ambapp_dev_irqmp *irqmp = NULL;
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ambapp_dev_gptimer *gptimer = NULL;
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ambapp_dev_gptimer *gptimer = NULL;
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unsigned int gptimer_irq = 0;
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unsigned int gptimer_irq = 0;
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int leon3_snooping_avail = 0;
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int leon3_snooping_avail = 0;
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struct {
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gd_t gd_area;
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bd_t bd;
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} global_data;
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/*
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/*
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* Breath some life into the CPU...
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* Breath some life into the CPU...
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*
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*
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@ -71,6 +63,15 @@ void cpu_init_f2(void)
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ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb);
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ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb);
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}
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}
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int arch_cpu_init(void)
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{
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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gd->bus_clk = CONFIG_SYS_CLK_FREQ;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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/*
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/*
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* initialize higher level parts of CPU like time base and timers
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* initialize higher level parts of CPU like time base and timers
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*/
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*/
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@ -1,5 +1,6 @@
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/*
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/*
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* Copyright 2009 Freescale Semiconductor, Inc.
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* Copyright 2015,
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+
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*/
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*/
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@ -7,6 +8,7 @@
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#ifndef _ASM_CONFIG_H_
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#ifndef _ASM_CONFIG_H_
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#define _ASM_CONFIG_H_
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#define _ASM_CONFIG_H_
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#define CONFIG_SYS_GENERIC_GLOBAL_DATA
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#define CONFIG_NEEDS_MANUAL_RELOC
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#define CONFIG_NEEDS_MANUAL_RELOC
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#define CONFIG_LMB
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#define CONFIG_LMB
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@ -17,6 +17,11 @@
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#ifndef __U_BOOT_H__
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#ifndef __U_BOOT_H__
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#define __U_BOOT_H__
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#define __U_BOOT_H__
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#ifdef CONFIG_SYS_GENERIC_BOARD
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/* Use the generic board which requires a unified bd_info */
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#include <asm-generic/u-boot.h>
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#else
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/*
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/*
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* Currently, this Board information is not passed to
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* Currently, this Board information is not passed to
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* Linux kernel from U-Boot, but may be passed to other
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* Linux kernel from U-Boot, but may be passed to other
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@ -44,6 +49,8 @@ typedef struct bd_info {
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* !CONFIG_SYS_GENERIC_BOARD */
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/* For image.h:image_check_target_arch() */
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/* For image.h:image_check_target_arch() */
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#define IH_ARCH_DEFAULT IH_ARCH_SPARC
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#define IH_ARCH_DEFAULT IH_ARCH_SPARC
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@ -1,9 +1,13 @@
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#
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#
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# (C) Copyright 2000-2006
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# (C) Copyright 2000-2015
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# SPDX-License-Identifier: GPL-2.0+
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# SPDX-License-Identifier: GPL-2.0+
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#
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#
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obj-y = board.o cache.o interrupts.o time.o
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obj-y = cache.o interrupts.o time.o
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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ifndef CONFIG_SYS_GENERIC_BOARD
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obj-y += board.o
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endif
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@ -813,7 +813,8 @@ init_fnc_t init_sequence_r[] = {
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initr_flash,
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initr_flash,
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#endif
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#endif
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INIT_FUNC_WATCHDOG_RESET
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INIT_FUNC_WATCHDOG_RESET
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#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86)
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#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) || \
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defined(CONFIG_SPARC)
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/* initialize higher level parts of CPU like time base and timers */
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/* initialize higher level parts of CPU like time base and timers */
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cpu_init_r,
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cpu_init_r,
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#endif
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#endif
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