sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
This commit is contained in:
Francois Retief 2015-10-28 14:29:32 +02:00
parent a5b629a33e
commit e17c5200c7
9 changed files with 43 additions and 26 deletions

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@ -97,6 +97,7 @@ config SH
config SPARC config SPARC
bool "SPARC architecture" bool "SPARC architecture"
select HAVE_GENERIC_BOARD
select CREATE_ARCH_SYMLINK select CREATE_ARCH_SYMLINK
config X86 config X86

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@ -1,7 +1,7 @@
/* CPU specific code for the LEON2 CPU /* CPU specific code for the LEON2 CPU
* *
* (C) Copyright 2007 * (C) Copyright 2007, 2015
* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
* *
* SPDX-License-Identifier: GPL-2.0+ * SPDX-License-Identifier: GPL-2.0+
*/ */

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@ -1,8 +1,8 @@
/* Initializes CPU and basic hardware such as memory /* Initializes CPU and basic hardware such as memory
* controllers, IRQ controller and system timer 0. * controllers, IRQ controller and system timer 0.
* *
* (C) Copyright 2007 * (C) Copyright 2007, 2015
* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
* *
* SPDX-License-Identifier: GPL-2.0+ * SPDX-License-Identifier: GPL-2.0+
*/ */
@ -18,14 +18,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
/* reset CPU (jump to 0, without reset) */
void start(void);
struct {
gd_t gd_area;
bd_t bd;
} global_data;
/* /*
* Breath some life into the CPU... * Breath some life into the CPU...
* *
@ -69,6 +61,15 @@ void cpu_init_f2(void)
} }
int arch_cpu_init(void)
{
gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
gd->bus_clk = CONFIG_SYS_CLK_FREQ;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
/* /*
* initialize higher level parts of CPU like time base and timers * initialize higher level parts of CPU like time base and timers
*/ */

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@ -1,7 +1,7 @@
/* CPU specific code for the LEON3 CPU /* CPU specific code for the LEON3 CPU
* *
* (C) Copyright 2007 * (C) Copyright 2007, 2015
* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
* *
* SPDX-License-Identifier: GPL-2.0+ * SPDX-License-Identifier: GPL-2.0+
*/ */

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@ -27,19 +27,11 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
/* reset CPU (jump to 0, without reset) */
void start(void);
ambapp_dev_irqmp *irqmp = NULL; ambapp_dev_irqmp *irqmp = NULL;
ambapp_dev_gptimer *gptimer = NULL; ambapp_dev_gptimer *gptimer = NULL;
unsigned int gptimer_irq = 0; unsigned int gptimer_irq = 0;
int leon3_snooping_avail = 0; int leon3_snooping_avail = 0;
struct {
gd_t gd_area;
bd_t bd;
} global_data;
/* /*
* Breath some life into the CPU... * Breath some life into the CPU...
* *
@ -71,6 +63,15 @@ void cpu_init_f2(void)
ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb); ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb);
} }
int arch_cpu_init(void)
{
gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
gd->bus_clk = CONFIG_SYS_CLK_FREQ;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
/* /*
* initialize higher level parts of CPU like time base and timers * initialize higher level parts of CPU like time base and timers
*/ */

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@ -1,5 +1,6 @@
/* /*
* Copyright 2009 Freescale Semiconductor, Inc. * Copyright 2015,
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
* *
* SPDX-License-Identifier: GPL-2.0+ * SPDX-License-Identifier: GPL-2.0+
*/ */
@ -7,6 +8,7 @@
#ifndef _ASM_CONFIG_H_ #ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_NEEDS_MANUAL_RELOC #define CONFIG_NEEDS_MANUAL_RELOC
#define CONFIG_LMB #define CONFIG_LMB

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@ -17,6 +17,11 @@
#ifndef __U_BOOT_H__ #ifndef __U_BOOT_H__
#define __U_BOOT_H__ #define __U_BOOT_H__
#ifdef CONFIG_SYS_GENERIC_BOARD
/* Use the generic board which requires a unified bd_info */
#include <asm-generic/u-boot.h>
#else
/* /*
* Currently, this Board information is not passed to * Currently, this Board information is not passed to
* Linux kernel from U-Boot, but may be passed to other * Linux kernel from U-Boot, but may be passed to other
@ -44,6 +49,8 @@ typedef struct bd_info {
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* !CONFIG_SYS_GENERIC_BOARD */
/* For image.h:image_check_target_arch() */ /* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_SPARC #define IH_ARCH_DEFAULT IH_ARCH_SPARC

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@ -1,9 +1,13 @@
# #
# (C) Copyright 2000-2006 # (C) Copyright 2000-2015
# Wolfgang Denk, DENX Software Engineering, wd@denx.de. # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# #
# SPDX-License-Identifier: GPL-2.0+ # SPDX-License-Identifier: GPL-2.0+
# #
obj-y = board.o cache.o interrupts.o time.o obj-y = cache.o interrupts.o time.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTM) += bootm.o
ifndef CONFIG_SYS_GENERIC_BOARD
obj-y += board.o
endif

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@ -813,7 +813,8 @@ init_fnc_t init_sequence_r[] = {
initr_flash, initr_flash,
#endif #endif
INIT_FUNC_WATCHDOG_RESET INIT_FUNC_WATCHDOG_RESET
#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) || \
defined(CONFIG_SPARC)
/* initialize higher level parts of CPU like time base and timers */ /* initialize higher level parts of CPU like time base and timers */
cpu_init_r, cpu_init_r,
#endif #endif