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psci: Fix warnings when compiling with W=1
This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
parent
f0ebcf8c17
commit
e21e3ffdd1
5 changed files with 28 additions and 13 deletions
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@ -276,7 +276,7 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc,
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return ARM_PSCI_RET_SUCCESS;
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return ARM_PSCI_RET_SUCCESS;
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}
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}
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void __secure psci_cpu_off(void)
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s32 __secure psci_cpu_off(void)
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{
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{
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psci_cpu_off_common();
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psci_cpu_off_common();
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@ -516,6 +516,21 @@ enum {
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*/
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*/
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void mmu_page_table_flush(unsigned long start, unsigned long stop);
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void mmu_page_table_flush(unsigned long start, unsigned long stop);
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#ifdef CONFIG_ARMV7_PSCI
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void psci_arch_cpu_entry(void);
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u32 psci_version(void);
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s32 psci_features(u32 function_id, u32 psci_fid);
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s32 psci_cpu_off(void);
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s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
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u32 context_id);
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s32 psci_affinity_info(u32 function_id, u32 target_affinity,
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u32 lowest_affinity_level);
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u32 psci_migrate_info_type(void);
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void psci_system_off(void);
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void psci_system_reset(void);
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s32 psci_features(u32 function_id, u32 psci_fid);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#define arch_align_stack(x) (x)
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#define arch_align_stack(x) (x)
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@ -298,7 +298,7 @@ __secure s32 psci_affinity_info(u32 __always_unused function_id,
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return psci_state[cpu];
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return psci_state[cpu];
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}
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}
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__secure s32 psci_migrate_info_type(u32 function_id)
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__secure u32 psci_migrate_info_type(void)
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{
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{
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/* Trusted OS is either not present or does not require migration */
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/* Trusted OS is either not present or does not require migration */
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return 2;
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return 2;
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@ -30,7 +30,7 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
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PSCI_AFFINITY_LEVEL_ON,
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PSCI_AFFINITY_LEVEL_ON,
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PSCI_AFFINITY_LEVEL_OFF};
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PSCI_AFFINITY_LEVEL_OFF};
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void __secure psci_set_state(int cpu, u8 state)
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static inline void psci_set_state(int cpu, u8 state)
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{
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{
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psci_state[cpu] = state;
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psci_state[cpu] = state;
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dsb();
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dsb();
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@ -67,7 +67,7 @@ void __secure psci_arch_cpu_entry(void)
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writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
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writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
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}
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}
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int __secure psci_features(u32 function_id, u32 psci_fid)
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s32 __secure psci_features(u32 function_id, u32 psci_fid)
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{
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{
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switch (psci_fid) {
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switch (psci_fid) {
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case ARM_PSCI_0_2_FN_PSCI_VERSION:
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case ARM_PSCI_0_2_FN_PSCI_VERSION:
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@ -82,12 +82,12 @@ int __secure psci_features(u32 function_id, u32 psci_fid)
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return ARM_PSCI_RET_NI;
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return ARM_PSCI_RET_NI;
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}
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}
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unsigned int __secure psci_version(u32 function_id)
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u32 __secure psci_version(void)
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{
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{
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return ARM_PSCI_VER_1_0;
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return ARM_PSCI_VER_1_0;
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}
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}
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int __secure psci_affinity_info(u32 function_id, u32 target_affinity,
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s32 __secure psci_affinity_info(u32 function_id, u32 target_affinity,
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u32 lowest_affinity_level)
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u32 lowest_affinity_level)
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{
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{
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u32 cpu = target_affinity & MPIDR_AFF0;
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u32 cpu = target_affinity & MPIDR_AFF0;
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@ -104,7 +104,7 @@ int __secure psci_affinity_info(u32 function_id, u32 target_affinity,
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return psci_state[cpu];
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return psci_state[cpu];
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}
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}
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int __secure psci_migrate_info_type(u32 function_id)
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u32 __secure psci_migrate_info_type(void)
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{
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{
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/*
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/*
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* in Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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* in Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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@ -116,7 +116,7 @@ int __secure psci_migrate_info_type(u32 function_id)
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return 2;
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return 2;
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}
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}
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int __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
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s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
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u32 context_id)
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u32 context_id)
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{
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{
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u32 cpu = target_cpu & MPIDR_AFF0;
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u32 cpu = target_cpu & MPIDR_AFF0;
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@ -161,7 +161,7 @@ int __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
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return ARM_PSCI_RET_SUCCESS;
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return ARM_PSCI_RET_SUCCESS;
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}
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}
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int __secure psci_cpu_off(u32 function_id)
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s32 __secure psci_cpu_off(void)
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{
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{
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u32 cpu;
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u32 cpu;
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@ -181,7 +181,7 @@ int __secure psci_cpu_off(u32 function_id)
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wfi();
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wfi();
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}
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}
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void __secure psci_system_reset(u32 function_id)
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void __secure psci_system_reset(void)
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{
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{
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/* System reset */
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/* System reset */
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writel(RCC_MP_GRSTCSETR_MPSYSRST, RCC_MP_GRSTCSETR);
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writel(RCC_MP_GRSTCSETR_MPSYSRST, RCC_MP_GRSTCSETR);
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@ -190,7 +190,7 @@ void __secure psci_system_reset(u32 function_id)
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wfi();
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wfi();
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}
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}
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void __secure psci_system_off(u32 function_id)
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void __secure psci_system_off(void)
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{
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{
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/* System Off is not managed, waiting user power off
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/* System Off is not managed, waiting user power off
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* TODO: handle I2C write in PMIC Main Control register bit 0 = SWOFF
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* TODO: handle I2C write in PMIC Main Control register bit 0 = SWOFF
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@ -130,7 +130,7 @@ void psci_arch_init(void)
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u32 uniphier_psci_holding_pen_release __secure_data = 0xffffffff;
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u32 uniphier_psci_holding_pen_release __secure_data = 0xffffffff;
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int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point,
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s32 __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point,
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u32 context_id)
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u32 context_id)
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{
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{
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u32 cpu = cpuid & 0xff;
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u32 cpu = cpuid & 0xff;
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@ -155,7 +155,7 @@ int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point,
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return PSCI_RET_SUCCESS;
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return PSCI_RET_SUCCESS;
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}
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}
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void __secure psci_system_reset(u32 function_id)
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void __secure psci_system_reset(void)
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{
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{
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reset_cpu(0);
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reset_cpu(0);
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}
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}
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