GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-19 13:41:31 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

psci: Fix warnings when compiling with W=1

Browse source 
This patch solves the following warnings:
arch/arm/mach-stm32mp/psci.c:

warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes]

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Patrick Delaunay 2019-07-22 14:19:20 +02:00 • committed by Tom Rini
parent f0ebcf8c17
commit e21e3ffdd1
5 changed files with 28 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/cpu/armv7/sunxi/psci.c
View file

@ -276,7 +276,7 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc,
return ARM_PSCI_RET_SUCCESS; return ARM_PSCI_RET_SUCCESS;
} }
void __secure psci_cpu_off(void) s32 __secure psci_cpu_off(void)
{ {
psci_cpu_off_common(); psci_cpu_off_common();

15
arch/arm/include/asm/system.h
View file

@ -516,6 +516,21 @@ enum {
*/ */
void mmu_page_table_flush(unsigned long start, unsigned long stop); void mmu_page_table_flush(unsigned long start, unsigned long stop);
#ifdef CONFIG_ARMV7_PSCI
void psci_arch_cpu_entry(void);
u32 psci_version(void);
s32 psci_features(u32 function_id, u32 psci_fid);
s32 psci_cpu_off(void);
s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
u32 context_id);
s32 psci_affinity_info(u32 function_id, u32 target_affinity,
u32 lowest_affinity_level);
u32 psci_migrate_info_type(void);
void psci_system_off(void);
void psci_system_reset(void);
s32 psci_features(u32 function_id, u32 psci_fid);
#endif
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x) #define arch_align_stack(x) (x)

2
arch/arm/mach-imx/mx7/psci-mx7.c
View file

@ -298,7 +298,7 @@ __secure s32 psci_affinity_info(u32 __always_unused function_id,
return psci_state[cpu]; return psci_state[cpu];
} }
__secure s32 psci_migrate_info_type(u32 function_id) __secure u32 psci_migrate_info_type(void)
{ {
/* Trusted OS is either not present or does not require migration */ /* Trusted OS is either not present or does not require migration */
return 2; return 2;

18
arch/arm/mach-stm32mp/psci.c
View file

@ -30,7 +30,7 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
PSCI_AFFINITY_LEVEL_ON, PSCI_AFFINITY_LEVEL_ON,
PSCI_AFFINITY_LEVEL_OFF}; PSCI_AFFINITY_LEVEL_OFF};
void __secure psci_set_state(int cpu, u8 state) static inline void psci_set_state(int cpu, u8 state)
{ {
psci_state[cpu] = state; psci_state[cpu] = state;
dsb(); dsb();
@ -67,7 +67,7 @@ void __secure psci_arch_cpu_entry(void)
writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER); writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
} }
int __secure psci_features(u32 function_id, u32 psci_fid) s32 __secure psci_features(u32 function_id, u32 psci_fid)
{ {
switch (psci_fid) { switch (psci_fid) {
case ARM_PSCI_0_2_FN_PSCI_VERSION: case ARM_PSCI_0_2_FN_PSCI_VERSION:
@ -82,12 +82,12 @@ int __secure psci_features(u32 function_id, u32 psci_fid)
return ARM_PSCI_RET_NI; return ARM_PSCI_RET_NI;
} }
unsigned int __secure psci_version(u32 function_id) u32 __secure psci_version(void)
{ {
return ARM_PSCI_VER_1_0; return ARM_PSCI_VER_1_0;
} }
int __secure psci_affinity_info(u32 function_id, u32 target_affinity, s32 __secure psci_affinity_info(u32 function_id, u32 target_affinity,
u32 lowest_affinity_level) u32 lowest_affinity_level)
{ {
u32 cpu = target_affinity & MPIDR_AFF0; u32 cpu = target_affinity & MPIDR_AFF0;
@ -104,7 +104,7 @@ int __secure psci_affinity_info(u32 function_id, u32 target_affinity,
return psci_state[cpu]; return psci_state[cpu];
} }
int __secure psci_migrate_info_type(u32 function_id) u32 __secure psci_migrate_info_type(void)
{ {
/* /*
* in Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf * in Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
@ -116,7 +116,7 @@ int __secure psci_migrate_info_type(u32 function_id)
return 2; return 2;
} }
int __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc, s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
u32 context_id) u32 context_id)
{ {
u32 cpu = target_cpu & MPIDR_AFF0; u32 cpu = target_cpu & MPIDR_AFF0;
@ -161,7 +161,7 @@ int __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
return ARM_PSCI_RET_SUCCESS; return ARM_PSCI_RET_SUCCESS;
} }
int __secure psci_cpu_off(u32 function_id) s32 __secure psci_cpu_off(void)
{ {
u32 cpu; u32 cpu;
@ -181,7 +181,7 @@ int __secure psci_cpu_off(u32 function_id)
wfi(); wfi();
} }
void __secure psci_system_reset(u32 function_id) void __secure psci_system_reset(void)
{ {
/* System reset */ /* System reset */
writel(RCC_MP_GRSTCSETR_MPSYSRST, RCC_MP_GRSTCSETR); writel(RCC_MP_GRSTCSETR_MPSYSRST, RCC_MP_GRSTCSETR);
@ -190,7 +190,7 @@ void __secure psci_system_reset(u32 function_id)
wfi(); wfi();
} }
void __secure psci_system_off(u32 function_id) void __secure psci_system_off(void)
{ {
/* System Off is not managed, waiting user power off /* System Off is not managed, waiting user power off
* TODO: handle I2C write in PMIC Main Control register bit 0 = SWOFF * TODO: handle I2C write in PMIC Main Control register bit 0 = SWOFF

4
arch/arm/mach-uniphier/arm32/psci.c
View file

@ -130,7 +130,7 @@ void psci_arch_init(void)
u32 uniphier_psci_holding_pen_release __secure_data = 0xffffffff; u32 uniphier_psci_holding_pen_release __secure_data = 0xffffffff;
int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point, s32 __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point,
u32 context_id) u32 context_id)
{ {
u32 cpu = cpuid & 0xff; u32 cpu = cpuid & 0xff;
@ -155,7 +155,7 @@ int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point,
return PSCI_RET_SUCCESS; return PSCI_RET_SUCCESS;
} }
void __secure psci_system_reset(u32 function_id) void __secure psci_system_reset(void)
{ {
reset_cpu(0); reset_cpu(0);
} }