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Stefan Roese 2007-06-25 20:20:30 +02:00
commit e4feb7638c
45 changed files with 888 additions and 204 deletions
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39
CHANGELOG
View file

@ -1,3 +1,42 @@
commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9
Author: Igor Lisitsin <igor@emcraft.com>
Date: Wed Apr 18 14:55:19 2007 +0400
Adapt log buffer code to support Linux 2.6
A new environment variable, "logversion", selects the log buffer
behaviour. If it is not set or set to a value other than 2, then the
old, Linux 2.4.4, behaviour is selected.
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
commit a11e06965ec91270c51853407ff1261d3c740386
Author: Igor Lisitsin <igor@emcraft.com>
Date: Wed Mar 28 19:06:19 2007 +0400
Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Fri Jun 22 14:58:04 2007 +0200
[ppc] Fix build breakage for all non-4xx PowerPC variants.
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup
commit 83b4cfa3d629dff0264366263c5e94d9a50ad80b
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Jun 20 18:14:24 2007 +0200
Coding style cleanup. Refresh CHANGELOG.
commit b3f9ec86e388207fd03dcdf7b145b9ed080bf024 commit b3f9ec86e388207fd03dcdf7b145b9ed080bf024
Author: Stefan Roese <sr@denx.de> Author: Stefan Roese <sr@denx.de>
Date: Tue Jun 19 17:22:44 2007 +0200 Date: Tue Jun 19 17:22:44 2007 +0200

10
board/amcc/sequoia/sequoia.c
View file

@ -573,3 +573,13 @@ int is_pci_host(struct pci_controller *hose)
return (1); return (1);
} }
#endif /* defined(CONFIG_PCI) */ #endif /* defined(CONFIG_PCI) */
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */

114
common/cmd_log.c
View file

@ -1,5 +1,5 @@
/* /*
* (C) Copyright 2002 * (C) Copyright 2002-2007
* Detlev Zundel, DENX Software Engineering, dzu@denx.de. * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
* *
* Code used from linux/kernel/printk.c * Code used from linux/kernel/printk.c
@ -60,45 +60,40 @@ static char buf[1024];
/* This combination will not print messages with the default loglevel */ /* This combination will not print messages with the default loglevel */
static unsigned console_loglevel = 3; static unsigned console_loglevel = 3;
static unsigned default_message_loglevel = 4; static unsigned default_message_loglevel = 4;
static unsigned char *log_buf = NULL; static unsigned log_version = 1;
static unsigned long *ext_log_size; static logbuff_t *log;
static unsigned long *ext_log_start;
static unsigned long *ext_logged_chars;
#define log_size (*ext_log_size)
#define log_start (*ext_log_start)
#define logged_chars (*ext_logged_chars)
/* Forced by code, eh! */
#define LOGBUFF_MAGIC 0xc0de4ced
/* The mapping used here has to be the same as in setup_ext_logbuff ()
in linux/kernel/printk */
void logbuff_init_ptrs (void) void logbuff_init_ptrs (void)
{ {
unsigned long *ext_tag; unsigned long tag, post_word;
unsigned long post_word;
char *s; char *s;
log_buf = (unsigned char *)(gd->bd->bi_memsize-LOGBUFF_LEN); log = (logbuff_t *)(gd->bd->bi_memsize-LOGBUFF_LEN) - 1;
ext_tag = (unsigned long *)(log_buf)-4;
ext_log_start = (unsigned long *)(log_buf)-3; /* Set up log version */
ext_log_size = (unsigned long *)(log_buf)-2; if ((s = getenv ("logversion")) != NULL)
ext_logged_chars = (unsigned long *)(log_buf)-1; log_version = (int)simple_strtoul (s, NULL, 10);
if (log_version == 2)
tag = log->v2.tag;
else
tag = log->v1.tag;
post_word = post_word_load(); post_word = post_word_load();
#ifdef CONFIG_POST #ifdef CONFIG_POST
/* The post routines have setup the word so we can simply test it */ /* The post routines have setup the word so we can simply test it */
if (post_word_load () & POST_COLDBOOT) { if (tag != LOGBUFF_MAGIC || (post_word & POST_COLDBOOT)) {
logged_chars = log_size = log_start = 0; logbuff_reset ();
*ext_tag = LOGBUFF_MAGIC;
} }
#else #else
/* No post routines, so we do our own checking */ /* No post routines, so we do our own checking */
if (post_word != LOGBUFF_MAGIC) { if (tag != LOGBUFF_MAGIC || post_word != LOGBUFF_MAGIC) {
logged_chars = log_size = log_start = 0; logbuff_reset ();
post_word_store (LOGBUFF_MAGIC); post_word_store (LOGBUFF_MAGIC);
*ext_tag = LOGBUFF_MAGIC;
} }
#endif #endif
if (log_version == 2 && (long)log->v2.start > (long)log->v2.con)
log->v2.start = log->v2.con;
/* Initialize default loglevel if present */ /* Initialize default loglevel if present */
if ((s = getenv ("loglevel")) != NULL) if ((s = getenv ("loglevel")) != NULL)
console_loglevel = (int)simple_strtoul (s, NULL, 10); console_loglevel = (int)simple_strtoul (s, NULL, 10);
@ -106,6 +101,15 @@ void logbuff_init_ptrs (void)
gd->post_log_word |= LOGBUFF_INITIALIZED; gd->post_log_word |= LOGBUFF_INITIALIZED;
} }
void logbuff_reset (void)
{
memset (log, 0, sizeof (logbuff_t));
if (log_version == 2)
log->v2.tag = LOGBUFF_MAGIC;
else
log->v1.tag = LOGBUFF_MAGIC;
}
int drv_logbuff_init (void) int drv_logbuff_init (void)
{ {
device_t logdev; device_t logdev;
@ -162,7 +166,7 @@ void logbuff_log(char *msg)
int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{ {
char *s; char *s;
unsigned long i; unsigned long i, start, size;
if (strcmp(argv[1],"append") == 0) { if (strcmp(argv[1],"append") == 0) {
/* Log concatenation of all arguments separated by spaces */ /* Log concatenation of all arguments separated by spaces */
@ -177,21 +181,34 @@ int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
case 2: case 2:
if (strcmp(argv[1],"show") == 0) { if (strcmp(argv[1],"show") == 0) {
for (i=0; i < (log_size&LOGBUFF_MASK); i++) { if (log_version == 2) {
s = (char *)log_buf+((log_start+i)&LOGBUFF_MASK); start = log->v2.start;
size = log->v2.end - log->v2.start;
}
else {
start = log->v1.start;
size = log->v1.size;
}
for (i=0; i < (size&LOGBUFF_MASK); i++) {
s = (char *)log->buf+((start+i)&LOGBUFF_MASK);
putc (*s); putc (*s);
} }
return 0; return 0;
} else if (strcmp(argv[1],"reset") == 0) { } else if (strcmp(argv[1],"reset") == 0) {
log_start = 0; logbuff_reset ();
log_size = 0;
logged_chars = 0;
return 0; return 0;
} else if (strcmp(argv[1],"info") == 0) { } else if (strcmp(argv[1],"info") == 0) {
printf ("Logbuffer at %08lx\n", (unsigned long)log_buf); printf ("Logbuffer at %08lx\n", (unsigned long)log->buf);
printf ("log_start = %08lx\n", log_start); if (log_version == 2) {
printf ("log_size = %08lx\n", log_size); printf ("log_start = %08lx\n", log->v2.start);
printf ("logged_chars = %08lx\n", logged_chars); printf ("log_end = %08lx\n", log->v2.end);
printf ("logged_chars = %08lx\n", log->v2.chars);
}
else {
printf ("log_start = %08lx\n", log->v1.start);
printf ("log_size = %08lx\n", log->v1.size);
printf ("logged_chars = %08lx\n", log->v1.chars);
}
return 0; return 0;
} }
printf ("Usage:\n%s\n", cmdtp->usage); printf ("Usage:\n%s\n", cmdtp->usage);
@ -202,7 +219,7 @@ int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 1; return 1;
} }
} }
#if defined(CONFIG_LOGBUFFER)
U_BOOT_CMD( U_BOOT_CMD(
log, 255, 1, do_log, log, 255, 1, do_log,
"log - manipulate logbuffer\n", "log - manipulate logbuffer\n",
@ -211,7 +228,7 @@ U_BOOT_CMD(
"log show - show contents\n" "log show - show contents\n"
"log append <msg> - append <msg> to the logbuffer\n" "log append <msg> - append <msg> to the logbuffer\n"
); );
#endif /* CONFIG_LOGBUFFER */
static int logbuff_printk(const char *line) static int logbuff_printk(const char *line)
{ {
int i; int i;
@ -241,13 +258,22 @@ static int logbuff_printk(const char *line)
} }
line_feed = 0; line_feed = 0;
for (; p < buf_end; p++) { for (; p < buf_end; p++) {
log_buf[(log_start+log_size) & LOGBUFF_MASK] = *p; if (log_version == 2) {
if (log_size < LOGBUFF_LEN) log->buf[log->v2.end & LOGBUFF_MASK] = *p;
log_size++; log->v2.end++;
if (log->v2.end - log->v2.start > LOGBUFF_LEN)
log->v2.start++;
log->v2.chars++;
}
else {
log->buf[(log->v1.start + log->v1.size) &
LOGBUFF_MASK] = *p;
if (log->v1.size < LOGBUFF_LEN)
log->v1.size++;
else else
log_start++; log->v1.start++;
log->v1.chars++;
logged_chars++; }
if (*p == '\n') { if (*p == '\n') {
line_feed = 1; line_feed = 1;
break; break;

2
cpu/ppc4xx/cpu_init.c
View file

@ -211,6 +211,8 @@ cpu_init_f (void)
val = mfspr(tcr); val = mfspr(tcr);
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) #if defined(CONFIG_440EP) || defined(CONFIG_440GR)
val |= 0xb8000000; /* generate system reset after 1.34 seconds */ val |= 0xb8000000; /* generate system reset after 1.34 seconds */
#elif defined(CONFIG_440EPX)
val |= 0xb0000000; /* generate system reset after 1.34 seconds */
#else #else
val |= 0xf0000000; /* generate system reset after 2.684 seconds */ val |= 0xf0000000; /* generate system reset after 2.684 seconds */
#endif #endif

15
include/configs/sequoia.h
View file

@ -59,6 +59,7 @@
#define CFG_MONITOR_BASE TEXT_BASE #define CFG_MONITOR_BASE TEXT_BASE
#define CFG_NAND_ADDR 0xd0000000 /* NAND Flash */ #define CFG_NAND_ADDR 0xd0000000 /* NAND Flash */
#define CFG_OCM_BASE 0xe0010000 /* ocm */ #define CFG_OCM_BASE 0xe0010000 /* ocm */
#define CFG_OCM_DATA_ADDR CFG_OCM_BASE
#define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */ #define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */
#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */ #define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000 #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
@ -81,7 +82,7 @@
#define CFG_INIT_RAM_END (4 << 10) #define CFG_INIT_RAM_END (4 << 10)
#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET #define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Serial Port * Serial Port
@ -328,6 +329,18 @@
CFG_CMD_SDRAM | \ CFG_CMD_SDRAM | \
CMD_USB) CMD_USB)
/* POST support */
#define CONFIG_POST (CFG_POST_MEMORY | \
CFG_POST_CPU | \
CFG_POST_UART | \
CFG_POST_I2C | \
CFG_POST_SPR)
#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
#define CONFIG_LOGBUFFER
#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
#define CONFIG_SUPPORT_VFAT #define CONFIG_SUPPORT_VFAT
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */

26
include/logbuff.h
View file

@ -1,5 +1,5 @@
/* /*
* (C) Copyright 2002 * (C) Copyright 2002-2007
* Detlev Zundel, dzu@denx.de. * Detlev Zundel, dzu@denx.de.
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
@ -25,6 +25,7 @@
#ifdef CONFIG_LOGBUFFER #ifdef CONFIG_LOGBUFFER
#define LOGBUFF_MAGIC 0xc0de4ced /* Forced by code, eh! */
#define LOGBUFF_LEN (16384) /* Must be 16k right now */ #define LOGBUFF_LEN (16384) /* Must be 16k right now */
#define LOGBUFF_MASK (LOGBUFF_LEN-1) #define LOGBUFF_MASK (LOGBUFF_LEN-1)
#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */ #define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
@ -32,6 +33,29 @@
#define LOGBUFF_INITIALIZED (1<<31) #define LOGBUFF_INITIALIZED (1<<31)
/* The mapping used here has to be the same as in setup_ext_logbuff ()
in linux/kernel/printk */
typedef struct {
union {
struct {
unsigned long tag;
unsigned long start;
unsigned long con;
unsigned long end;
unsigned long chars;
} v2;
struct {
unsigned long dummy;
unsigned long tag;
unsigned long start;
unsigned long size;
unsigned long chars;
} v1;
};
unsigned char buf[0];
} logbuff_t;
int drv_logbuff_init (void); int drv_logbuff_init (void);
void logbuff_init_ptrs (void); void logbuff_init_ptrs (void);
void logbuff_log(char *msg); void logbuff_log(char *msg);

1
include/post.h
View file

@ -91,6 +91,7 @@ extern int post_hotkeys_pressed(void);
#define CFG_POST_SYSMON 0x00000800 #define CFG_POST_SYSMON 0x00000800
#define CFG_POST_DSP 0x00001000 #define CFG_POST_DSP 0x00001000
#define CFG_POST_CODEC 0x00002000 #define CFG_POST_CODEC 0x00002000
#define CFG_POST_FPU 0x00004000
#endif /* CONFIG_POST */ #endif /* CONFIG_POST */

50
include/ppc440.h
View file

@ -282,6 +282,32 @@
#define sdr_sdstp3 0x4003 #define sdr_sdstp3 0x4003
#endif /* CONFIG_440GX */ #endif /* CONFIG_440GX */
#ifdef CONFIG_440
/*----------------------------------------------------------------------------+
| Core Configuration/MMU configuration for 440 (CCR1 for 440x5 only).
+----------------------------------------------------------------------------*/
#define CCR0_PRE 0x40000000
#define CCR0_CRPE 0x08000000
#define CCR0_DSTG 0x00200000
#define CCR0_DAPUIB 0x00100000
#define CCR0_DTB 0x00008000
#define CCR0_GICBT 0x00004000
#define CCR0_GDCBT 0x00002000
#define CCR0_FLSTA 0x00000100
#define CCR0_ICSLC_MASK 0x0000000C
#define CCR0_ICSLT_MASK 0x00000003
#define CCR1_TCS_MASK 0x00000080
#define CCR1_TCS_INTCLK 0x00000000
#define CCR1_TCS_EXTCLK 0x00000080
#define MMUCR_SWOA 0x01000000
#define MMUCR_U1TE 0x00400000
#define MMUCR_U2SWOAE 0x00200000
#define MMUCR_DULXE 0x00800000
#define MMUCR_IULXE 0x00400000
#define MMUCR_STS 0x00100000
#define MMUCR_STID_MASK 0x000000FF
#endif /* CONFIG_440 */
#ifdef CONFIG_440SPE #ifdef CONFIG_440SPE
#undef sdr_sdstp2 #undef sdr_sdstp2
#define sdr_sdstp2 0x0022 #define sdr_sdstp2 0x0022
@ -307,30 +333,6 @@
#define sdr_sdstp6 0x4005 #define sdr_sdstp6 0x4005
#define sdr_sdstp7 0x4007 #define sdr_sdstp7 0x4007
/*----------------------------------------------------------------------------+
| Core Configuration/MMU configuration for 440 (CCR1 for 440x5 only).
+----------------------------------------------------------------------------*/
#define CCR0_PRE 0x40000000
#define CCR0_CRPE 0x08000000
#define CCR0_DSTG 0x00200000
#define CCR0_DAPUIB 0x00100000
#define CCR0_DTB 0x00008000
#define CCR0_GICBT 0x00004000
#define CCR0_GDCBT 0x00002000
#define CCR0_FLSTA 0x00000100
#define CCR0_ICSLC_MASK 0x0000000C
#define CCR0_ICSLT_MASK 0x00000003
#define CCR1_TCS_MASK 0x00000080
#define CCR1_TCS_INTCLK 0x00000000
#define CCR1_TCS_EXTCLK 0x00000080
#define MMUCR_SEOA 0x01000000
#define MMUCR_U1TE 0x00400000
#define MMUCR_U2SWOAE 0x00200000
#define MMUCR_DULXE 0x00800000
#define MMUCR_IULXE 0x00400000
#define MMUCR_STS 0x00100000
#define MMUCR_STID_MASK 0x000000FF
#define SDR0_CFGADDR 0x00E #define SDR0_CFGADDR 0x00E
#define SDR0_CFGDATA 0x00F #define SDR0_CFGDATA 0x00F

28
post/cpu/ppc4xx/Makefile Normal file
View file

@ -0,0 +1,28 @@
#
# (C) Copyright 2002-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
LIB = libpostppc4xx.a
COBJS = fpu.o spr.o uart.o watchdog.o
include $(TOPDIR)/post/rules.mk

55
post/cpu/ppc4xx/fpu.c Normal file
View file

@ -0,0 +1,55 @@
/*
* Copyright (C) 2007 Wolfgang Denk <wd@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#ifdef CONFIG_POST
#if defined(CONFIG_440EP) || \
defined(CONFIG_440EPX)
#include <ppc4xx.h>
#include <asm/processor.h>
int fpu_status(void)
{
if (mfspr(ccr0) & CCR0_DAPUIB)
return 0; /* Disabled */
else
return 1; /* Enabled */
}
void fpu_disable(void)
{
mtspr(ccr0, mfspr(ccr0) | CCR0_DAPUIB);
mtmsr(mfmsr() & ~MSR_FP);
}
void fpu_enable(void)
{
mtspr(ccr0, mfspr(ccr0) & ~CCR0_DAPUIB);
mtmsr(mfmsr() | MSR_FP);
}
#endif
#endif

176
post/cpu/ppc4xx/spr.c Normal file
View file

@ -0,0 +1,176 @@
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* SPR test
*
* The test checks the contents of Special Purpose Registers (SPR) listed
* in the spr_test_list array below.
* Each SPR value is read using mfspr instruction, some bits are masked
* according to the table and the resulting value is compared to the
* corresponding table value.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_SPR
static struct
{
int number;
char * name;
unsigned long mask;
unsigned long value;
} spr_test_list [] = {
/* Standard Special-Purpose Registers */
{0x001, "XER", 0x00000000, 0x00000000},
{0x008, "LR", 0x00000000, 0x00000000},
{0x009, "CTR", 0x00000000, 0x00000000},
{0x016, "DEC", 0x00000000, 0x00000000},
{0x01a, "SRR0", 0x00000000, 0x00000000},
{0x01b, "SRR1", 0x00000000, 0x00000000},
{0x110, "SPRG0", 0x00000000, 0x00000000},
{0x111, "SPRG1", 0x00000000, 0x00000000},
{0x112, "SPRG2", 0x00000000, 0x00000000},
{0x113, "SPRG3", 0x00000000, 0x00000000},
{0x11f, "PVR", 0x00000000, 0x00000000},
/* Additional Special-Purpose Registers */
{0x30, "PID", 0x00000000, 0x00000000},
{0x3a, "CSRR0", 0x00000000, 0x00000000},
{0x3b, "CSRR1", 0x00000000, 0x00000000},
{0x3d, "DEAR", 0x00000000, 0x00000000},
{0x3e, "ESR", 0x00000000, 0x00000000},
{0x3f, "IVPR", 0xffff0000, 0x00000000},
{0x100, "USPRG0", 0x00000000, 0x00000000},
{0x104, "SPRG4", 0x00000000, 0x00000000},
{0x105, "SPRG5", 0x00000000, 0x00000000},
{0x106, "SPRG6", 0x00000000, 0x00000000},
{0x107, "SPRG7", 0x00000000, 0x00000000},
{0x10c, "TBL", 0x00000000, 0x00000000},
{0x10d, "TBU", 0x00000000, 0x00000000},
{0x11e, "PIR", 0x0000000f, 0x00000000},
{0x130, "DBSR", 0x00000000, 0x00000000},
{0x134, "DBCR0", 0x00000000, 0x00000000},
{0x135, "DBCR1", 0x00000000, 0x00000000},
{0x136, "DBCR2", 0x00000000, 0x00000000},
{0x138, "IAC1", 0x00000000, 0x00000000},
{0x139, "IAC2", 0x00000000, 0x00000000},
{0x13a, "IAC3", 0x00000000, 0x00000000},
{0x13b, "IAC4", 0x00000000, 0x00000000},
{0x13c, "DAC1", 0x00000000, 0x00000000},
{0x13d, "DAC2", 0x00000000, 0x00000000},
{0x13e, "DVC1", 0x00000000, 0x00000000},
{0x13f, "DVC2", 0x00000000, 0x00000000},
{0x150, "TSR", 0x00000000, 0x00000000},
{0x154, "TCR", 0x00000000, 0x00000000},
{0x190, "IVOR0", 0x00000000, 0x00000000},
{0x191, "IVOR1", 0x00000000, 0x00000000},
{0x192, "IVOR2", 0x00000000, 0x00000000},
{0x193, "IVOR3", 0x00000000, 0x00000000},
{0x194, "IVOR4", 0x00000000, 0x00000000},
{0x195, "IVOR5", 0x00000000, 0x00000000},
{0x196, "IVOR6", 0x00000000, 0x00000000},
{0x197, "IVOR7", 0x00000000, 0x00000000},
{0x198, "IVOR8", 0x00000000, 0x00000000},
{0x199, "IVOR9", 0x00000000, 0x00000000},
{0x19a, "IVOR10", 0x00000000, 0x00000000},
{0x19b, "IVOR11", 0x00000000, 0x00000000},
{0x19c, "IVOR12", 0x00000000, 0x00000000},
{0x19d, "IVOR13", 0x00000000, 0x00000000},
{0x19e, "IVOR14", 0x00000000, 0x00000000},
{0x19f, "IVOR15", 0x00000000, 0x00000000},
{0x23a, "MCSRR0", 0x00000000, 0x00000000},
{0x23b, "MCSRR1", 0x00000000, 0x00000000},
{0x23c, "MCSR", 0x00000000, 0x00000000},
{0x370, "INV0", 0x00000000, 0x00000000},
{0x371, "INV1", 0x00000000, 0x00000000},
{0x372, "INV2", 0x00000000, 0x00000000},
{0x373, "INV3", 0x00000000, 0x00000000},
{0x374, "ITV0", 0x00000000, 0x00000000},
{0x375, "ITV1", 0x00000000, 0x00000000},
{0x376, "ITV2", 0x00000000, 0x00000000},
{0x377, "ITV3", 0x00000000, 0x00000000},
{0x378, "CCR1", 0x00000000, 0x00000000},
{0x390, "DNV0", 0x00000000, 0x00000000},
{0x391, "DNV1", 0x00000000, 0x00000000},
{0x392, "DNV2", 0x00000000, 0x00000000},
{0x393, "DNV3", 0x00000000, 0x00000000},
{0x394, "DTV0", 0x00000000, 0x00000000},
{0x395, "DTV1", 0x00000000, 0x00000000},
{0x396, "DTV2", 0x00000000, 0x00000000},
{0x397, "DTV3", 0x00000000, 0x00000000},
{0x398, "DVLIM", 0x00000000, 0x00000000},
{0x399, "IVLIM", 0x00000000, 0x00000000},
{0x39b, "RSTCFG", 0x00000000, 0x00000000},
{0x39c, "DCDBTRL", 0x00000000, 0x00000000},
{0x39d, "DCDBTRH", 0x00000000, 0x00000000},
{0x39e, "ICDBTRL", 0x00000000, 0x00000000},
{0x39f, "ICDBTRH", 0x00000000, 0x00000000},
{0x3b2, "MMUCR", 0x00000000, 0x00000000},
{0x3b3, "CCR0", 0x00000000, 0x00000000},
{0x3d3, "ICDBDR", 0x00000000, 0x00000000},
{0x3f3, "DBDR", 0x00000000, 0x00000000},
};
static int spr_test_list_size =
sizeof (spr_test_list) / sizeof (spr_test_list[0]);
int spr_post_test (int flags)
{
int ret = 0;
int i;
unsigned long code[] = {
0x7c6002a6, /* mfspr r3,SPR */
0x4e800020 /* blr */
};
unsigned long (*get_spr) (void) = (void *) code;
for (i = 0; i < spr_test_list_size; i++) {
int num = spr_test_list[i].number;
/* mfspr r3,num */
code[0] = 0x7c6002a6 | ((num & 0x1F) << 16) | ((num & 0x3E0) << 6);
asm volatile ("isync");
if ((get_spr () & spr_test_list[i].mask) !=
(spr_test_list[i].value & spr_test_list[i].mask)) {
post_log ("The value of %s special register "
"is incorrect: 0x%08X\n",
spr_test_list[i].name, get_spr ());
ret = -1;
}
}
return ret;
}
#endif /* CONFIG_POST & CFG_POST_SPR */
#endif /* CONFIG_POST */

214
post/cpu/ppc4xx/uart.c Normal file
View file

@ -0,0 +1,214 @@
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* UART test
*
* The controllers are configured to loopback mode and several
* characters are transmitted.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_UART
#include <asm/processor.h>
#include <serial.h>
#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300
#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400
#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000500
#define UART3_BASE CFG_PERIPHERAL_BASE + 0x00000600
#define CR0_MASK 0xdfffffff
#define CR0_EXTCLK_ENA 0x00800000
#define CR0_UDIV_POS 0
#define UDIV_SUBTRACT 0
#define UART0_SDR sdr_uart0
#define UART1_SDR sdr_uart1
#define UART2_SDR sdr_uart2
#define UART3_SDR sdr_uart3
#define MFREG(a, d) mfsdr(a, d)
#define MTREG(a, d) mtsdr(a, d)
#define UART_RBR 0x00
#define UART_THR 0x00
#define UART_IER 0x01
#define UART_IIR 0x02
#define UART_FCR 0x02
#define UART_LCR 0x03
#define UART_MCR 0x04
#define UART_LSR 0x05
#define UART_MSR 0x06
#define UART_SCR 0x07
#define UART_DLL 0x00
#define UART_DLM 0x01
/*
Line Status Register.
*/
#define asyncLSRDataReady1 0x01
#define asyncLSROverrunError1 0x02
#define asyncLSRParityError1 0x04
#define asyncLSRFramingError1 0x08
#define asyncLSRBreakInterrupt1 0x10
#define asyncLSRTxHoldEmpty1 0x20
#define asyncLSRTxShiftEmpty1 0x40
#define asyncLSRRxFifoError1 0x80
DECLARE_GLOBAL_DATA_PTR;
static int uart_post_init (unsigned long dev_base)
{
unsigned long reg;
unsigned long udiv;
unsigned short bdiv;
volatile char val;
#ifdef CFG_EXT_SERIAL_CLOCK
unsigned long tmp;
#endif
int i;
for (i = 0; i < 3500; i++) {
if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1)
break;
udelay (100);
}
MFREG(UART0_SDR, reg);
reg &= ~CR0_MASK;
#ifdef CFG_EXT_SERIAL_CLOCK
reg |= CR0_EXTCLK_ENA;
udiv = 1;
tmp = gd->baudrate * 16;
bdiv = (CFG_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
#else
/* For 440, the cpu clock is on divider chain A, UART on divider
* chain B ... so cpu clock is irrelevant. Get the "optimized"
* values that are subject to the 1/2 opb clock constraint
*/
serial_divs (gd->baudrate, &udiv, &bdiv);
#endif
reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */
/*
* Configure input clock to baudrate generator for all
* available serial ports here
*/
MTREG(UART0_SDR, reg);
#if defined(UART1_SDR)
MTREG(UART1_SDR, reg);
#endif
#if defined(UART2_SDR)
MTREG(UART2_SDR, reg);
#endif
#if defined(UART3_SDR)
MTREG(UART3_SDR, reg);
#endif
out8(dev_base + UART_LCR, 0x80); /* set DLAB bit */
out8(dev_base + UART_DLL, bdiv); /* set baudrate divisor */
out8(dev_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
out8(dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
out8(dev_base + UART_FCR, 0x00); /* disable FIFO */
out8(dev_base + UART_MCR, 0x10); /* enable loopback mode */
val = in8(dev_base + UART_LSR); /* clear line status */
val = in8(dev_base + UART_RBR); /* read receive buffer */
out8(dev_base + UART_SCR, 0x00); /* set scratchpad */
out8(dev_base + UART_IER, 0x00); /* set interrupt enable reg */
return 0;
}
static void uart_post_putc (unsigned long dev_base, char c)
{
int i;
out8 (dev_base + UART_THR, c); /* put character out */
/* Wait for transfer completion */
for (i = 0; i < 3500; i++) {
if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1)
break;
udelay (100);
}
}
static int uart_post_getc (unsigned long dev_base)
{
int i;
/* Wait for character available */
for (i = 0; i < 3500; i++) {
if (in8 (dev_base + UART_LSR) & asyncLSRDataReady1)
break;
udelay (100);
}
return 0xff & in8 (dev_base + UART_RBR);
}
static int test_ctlr (unsigned long dev_base, int index)
{
int res = -1;
char test_str[] = "*** UART Test String ***\r\n";
int i;
uart_post_init (dev_base);
for (i = 0; i < sizeof (test_str) - 1; i++) {
uart_post_putc (dev_base, test_str[i]);
if (uart_post_getc (dev_base) != test_str[i])
goto done;
}
res = 0;
done:
if (res)
post_log ("uart%d test failed\n", index);
return res;
}
int uart_post_test (int flags)
{
int i, res = 0;
static unsigned long base[] = {
UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE
};
for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) {
if (test_ctlr (base[i], i))
res = -1;
}
serial_reinit_all ();
return res;
}
#endif /* CONFIG_POST & CFG_POST_UART */
#endif /* CONFIG_POST */

68
post/cpu/ppc4xx/watchdog.c Normal file
View file

@ -0,0 +1,68 @@
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* Watchdog test
*
* The test verifies the watchdog timer operation.
* On the first iteration, the test routine disables interrupts and
* makes a 10-second delay. If the system does not reboot during this delay,
* the watchdog timer is not operational and the test fails. If the system
* reboots, on the second iteration the test routine reports a success.
*/
#ifdef CONFIG_POST
#include <post.h>
#include <watchdog.h>
#if CONFIG_POST & CFG_POST_WATCHDOG
int watchdog_post_test (int flags)
{
if (flags & POST_REBOOT) {
/* Test passed */
return 0;
} else {
/* 10-second delay */
int ints = disable_interrupts ();
ulong base = post_time_ms (0);
while (post_time_ms (base) < 10000)
;
if (ints)
enable_interrupts ();
/*
* If we have reached this point, the watchdog timer
* does not work
*/
return -1;
}
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
#endif /* CONFIG_POST */

12
post/lib_ppc/asm.S
View file

@ -34,6 +34,7 @@
/* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */ /* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */
.global cpu_post_exec_02 .global cpu_post_exec_02
cpu_post_exec_02: cpu_post_exec_02:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
@ -56,6 +57,7 @@ cpu_post_exec_02:
/* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */ /* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */
.global cpu_post_exec_04 .global cpu_post_exec_04
cpu_post_exec_04: cpu_post_exec_04:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
@ -80,6 +82,7 @@ cpu_post_exec_04:
/* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */ /* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */
.global cpu_post_exec_12 .global cpu_post_exec_12
cpu_post_exec_12: cpu_post_exec_12:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -100,6 +103,7 @@ cpu_post_exec_12:
/* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */ /* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */
.global cpu_post_exec_11 .global cpu_post_exec_11
cpu_post_exec_11: cpu_post_exec_11:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -119,6 +123,7 @@ cpu_post_exec_11:
/* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */ /* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */
.global cpu_post_exec_21 .global cpu_post_exec_21
cpu_post_exec_21: cpu_post_exec_21:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -148,6 +153,7 @@ cpu_post_exec_21:
ulong op2); */ ulong op2); */
.global cpu_post_exec_22 .global cpu_post_exec_22
cpu_post_exec_22: cpu_post_exec_22:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -177,6 +183,7 @@ cpu_post_exec_22:
/* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */ /* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */
.global cpu_post_exec_12w .global cpu_post_exec_12w
cpu_post_exec_12w: cpu_post_exec_12w:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -198,6 +205,7 @@ cpu_post_exec_12w:
/* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */ /* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */
.global cpu_post_exec_11w .global cpu_post_exec_11w
cpu_post_exec_11w: cpu_post_exec_11w:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -218,6 +226,7 @@ cpu_post_exec_11w:
/* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */ /* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */
.global cpu_post_exec_22w .global cpu_post_exec_22w
cpu_post_exec_22w: cpu_post_exec_22w:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -241,6 +250,7 @@ cpu_post_exec_22w:
/* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */ /* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */
.global cpu_post_exec_21w .global cpu_post_exec_21w
cpu_post_exec_21w: cpu_post_exec_21w:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -263,6 +273,7 @@ cpu_post_exec_21w:
/* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */ /* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */
.global cpu_post_exec_21x .global cpu_post_exec_21x
cpu_post_exec_21x: cpu_post_exec_21x:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)
@ -286,6 +297,7 @@ cpu_post_exec_21x:
ulong cr); */ ulong cr); */
.global cpu_post_exec_31 .global cpu_post_exec_31
cpu_post_exec_31: cpu_post_exec_31:
isync
mflr r0 mflr r0
stwu r0, -4(r1) stwu r0, -4(r1)
stwu r4, -4(r1) stwu r4, -4(r1)

8
post/lib_ppc/b.c
View file

@ -49,7 +49,7 @@ extern void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump,
ulong cr); ulong cr);
static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi, static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi,
int pjump, int dec, int link, ulong pctr, ulong cr) int pjump, int decr, int link, ulong pctr, ulong cr)
{ {
int ret = 0; int ret = 0;
ulong lr = 0; ulong lr = 0;
@ -77,7 +77,7 @@ static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi,
ret = pjump == jump ? 0 : -1; ret = pjump == jump ? 0 : -1;
if (ret == 0) if (ret == 0)
{ {
if (dec) if (decr)
ret = pctr == ctr + 1 ? 0 : -1; ret = pctr == ctr + 1 ? 0 : -1;
else else
ret = pctr == ctr ? 0 : -1; ret = pctr == ctr ? 0 : -1;
@ -163,7 +163,7 @@ int cpu_post_test_b (void)
{ {
for (ctr = 1; ctr <= 2 && ret == 0; ctr++) for (ctr = 1; ctr <= 2 && ret == 0; ctr++)
{ {
int dec = cd < 2; int decr = cd < 2;
int cr = cond ? 0x80000000 : 0x00000000; int cr = cond ? 0x80000000 : 0x00000000;
int jumpc = cc >= 2 || int jumpc = cc >= 2 ||
(cc == 0 && !cond) || (cc == 0 && !cond) ||
@ -174,7 +174,7 @@ int cpu_post_test_b (void)
int jump = jumpc && jumpd; int jump = jumpc && jumpd;
ret = cpu_post_test_bc (link ? OP_BCL : OP_BC, ret = cpu_post_test_bc (link ? OP_BCL : OP_BC,
(cc << 3) + (cd << 1), 0, jump, dec, link, (cc << 3) + (cd << 1), 0, jump, decr, link,
ctr, cr); ctr, cr);
if (ret != 0) if (ret != 0)

2
post/post.c
View file

@ -428,7 +428,7 @@ void post_reloc (void)
unsigned long post_time_ms (unsigned long base) unsigned long post_time_ms (unsigned long base)
{ {
#ifdef CONFIG_PPC #ifdef CONFIG_PPC
return (unsigned long)get_ticks () / (get_tbclk () / CFG_HZ) - base; return (unsigned long)(get_ticks () / (get_tbclk () / CFG_HZ)) - base;
#else #else
#warning "Not implemented yet" #warning "Not implemented yet"
return 0; /* Not implemented yet */ return 0; /* Not implemented yet */

14
post/tests.c
View file

@ -37,6 +37,7 @@ extern int i2c_post_test (int flags);
extern int rtc_post_test (int flags); extern int rtc_post_test (int flags);
extern int memory_post_test (int flags); extern int memory_post_test (int flags);
extern int cpu_post_test (int flags); extern int cpu_post_test (int flags);
extern int fpu_post_test (int flags);
extern int uart_post_test (int flags); extern int uart_post_test (int flags);
extern int ether_post_test (int flags); extern int ether_post_test (int flags);
extern int spi_post_test (int flags); extern int spi_post_test (int flags);
@ -126,6 +127,19 @@ struct post_test post_list[] =
CFG_POST_CPU CFG_POST_CPU
}, },
#endif #endif
#if CONFIG_POST & CFG_POST_FPU
{
"FPU test",
"fpu",
"This test verifies the arithmetic logic unit of"
" FPU.",
POST_RAM | POST_ALWAYS,
&fpu_post_test,
NULL,
NULL,
CFG_POST_FPU
},
#endif
#if CONFIG_POST & CFG_POST_UART #if CONFIG_POST & CFG_POST_UART
{ {
"UART test", "UART test",