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Blackfin: convert bfin_sdh to generic mmc

Browse source 
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Cliff Cai 2009-11-20 08:24:43 +00:00 • committed by Mike Frysinger
parent 17ebd5bf33
commit e54c820991
9 changed files with 165 additions and 463 deletions
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8
board/bf518f-ezbrd/bf518f-ezbrd.c
View file

@ -15,6 +15,7 @@
#include <asm/blackfin.h>
#include <asm/net.h>
#include <asm/mach-common/bits/otp.h>
#include <asm/sdh.h>
DECLARE_GLOBAL_DATA_PTR;
@ -155,3 +156,10 @@ int board_early_init_f(void)
#endif
return 0;
}
#ifdef CONFIG_BFIN_SDH
int board_mmc_init(bd_t *bis)
{
return bfin_mmc_init(bis);
}
#endif

8
board/bf548-ezkit/bf548-ezkit.c
View file

@ -11,6 +11,7 @@
#include <config.h>
#include <command.h>
#include <asm/blackfin.h>
#include <asm/sdh.h>
DECLARE_GLOBAL_DATA_PTR;
@ -78,3 +79,10 @@ int board_eth_init(bd_t *bis)
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
}
#endif
#ifdef CONFIG_BFIN_SDH
int board_mmc_init(bd_t *bis)
{
return bfin_mmc_init(bis);
}
#endif

527
drivers/mmc/bfin_sdh.c
View file

@ -1,7 +1,7 @@
/*
* Driver for Blackfin on-chip SDH controller
*
* Copyright (c) 2008 Analog Devices Inc.
* Copyright (c) 2008-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
@ -18,20 +18,6 @@
#include <asm/mach-common/bits/sdh.h>
#include <asm/mach-common/bits/dma.h>
#include "bfin_sdh.h"
/* SD_CLK frequency must be less than 400k in identification mode */
#ifndef CONFIG_SYS_MMC_CLK_ID
#define CONFIG_SYS_MMC_CLK_ID 200000
#endif
/* SD_CLK for normal working */
#ifndef CONFIG_SYS_MMC_CLK_OP
#define CONFIG_SYS_MMC_CLK_OP 25000000
#endif
/* support 3.2-3.3V and 3.3-3.4V */
#define CONFIG_SYS_MMC_OP_COND 0x00300000
#define MMC_DEFAULT_RCA 1
#if defined(__ADSPBF51x__)
# define bfin_read_SDH_PWR_CTL bfin_read_RSI_PWR_CONTROL
# define bfin_write_SDH_PWR_CTL bfin_write_RSI_PWR_CONTROL
@ -64,61 +50,17 @@
# error no support for this proc yet
#endif
static unsigned int mmc_rca;
static int mmc_card_is_sd;
static block_dev_desc_t mmc_blkdev;
struct mmc_cid cid;
static __u32 csd[4];
#define get_bits(resp, start, size) \
({ \
const int __size = size; \
const uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1; \
const int32_t __off = 3 - ((start) / 32); \
const int32_t __shft = (start) & 31; \
uint32_t __res; \
\
__res = resp[__off] >> __shft; \
if (__size + __shft > 32) \
__res |= resp[__off-1] << ((32 - __shft) % 32); \
__res & __mask; \
})
block_dev_desc_t *mmc_get_dev(int dev)
{
return &mmc_blkdev;
}
static void mci_set_clk(unsigned long clk)
{
unsigned long sys_clk;
unsigned long clk_div;
__u16 clk_ctl = 0;
/* setting SD_CLK */
sys_clk = get_sclk();
bfin_write_SDH_CLK_CTL(0);
if (sys_clk % (2 * clk) == 0)
clk_div = sys_clk / (2 * clk) - 1;
else
clk_div = sys_clk / (2 * clk);
if (clk_div > 0xff)
clk_div = 0xff;
clk_ctl |= (clk_div & 0xff);
clk_ctl |= CLK_E;
bfin_write_SDH_CLK_CTL(clk_ctl);
}
static int
mmc_cmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags)
sdh_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)
{
unsigned int sdh_cmd;
unsigned int status;
int cmd = mmc_cmd->cmdidx;
int flags = mmc_cmd->resp_type;
int arg = mmc_cmd->cmdarg;
int ret = 0;
sdh_cmd = 0;
unsigned long *response = resp;
sdh_cmd |= cmd;
if (flags & MMC_RSP_PRESENT)
@ -138,336 +80,137 @@ mmc_cmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags)
CMD_CRC_FAIL)));
if (flags & MMC_RSP_PRESENT) {
response[0] = bfin_read_SDH_RESPONSE0();
mmc_cmd->response[0] = bfin_read_SDH_RESPONSE0();
if (flags & MMC_RSP_136) {
response[1] = bfin_read_SDH_RESPONSE1();
response[2] = bfin_read_SDH_RESPONSE2();
response[3] = bfin_read_SDH_RESPONSE3();
mmc_cmd->response[1] = bfin_read_SDH_RESPONSE1();
mmc_cmd->response[2] = bfin_read_SDH_RESPONSE2();
mmc_cmd->response[3] = bfin_read_SDH_RESPONSE3();
}
}
if (status & CMD_TIME_OUT) {
printf("CMD%d timeout\n", (int)cmd);
ret |= -ETIMEDOUT;
} else if (status & CMD_CRC_FAIL && flags & MMC_RSP_CRC) {
printf("CMD%d CRC failure\n", (int)cmd);
ret |= -EILSEQ;
}
if (status & CMD_TIME_OUT)
ret |= TIMEOUT;
else if (status & CMD_CRC_FAIL && flags & MMC_RSP_CRC)
ret |= COMM_ERR;
bfin_write_SDH_STATUS_CLR(CMD_SENT_STAT | CMD_RESP_END_STAT |
CMD_TIMEOUT_STAT | CMD_CRC_FAIL_STAT);
return ret;
}
static int
mmc_acmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags)
/* set data for single block transfer */
static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)
{
unsigned long aresp[4];
u16 data_ctl = 0;
u16 dma_cfg = 0;
int ret = 0;
ret = mmc_cmd(MMC_CMD_APP_CMD, 0, aresp,
MMC_RSP_PRESENT);
if (ret)
return ret;
/* Don't support write yet. */
if (data->flags & MMC_DATA_WRITE)
return UNUSABLE_ERR;
data_ctl |= ((ffs(data->blocksize) - 1) << 4);
data_ctl |= DTX_DIR;
bfin_write_SDH_DATA_CTL(data_ctl);
dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;
bfin_write_SDH_DATA_TIMER(0xFFFF);
blackfin_dcache_flush_invalidate_range(data->dest,
data->dest + data->blocksize);
/* configure DMA */
bfin_write_DMA_START_ADDR(data->dest);
bfin_write_DMA_X_COUNT(data->blocksize / 4);
bfin_write_DMA_X_MODIFY(4);
bfin_write_DMA_CONFIG(dma_cfg);
bfin_write_SDH_DATA_LGTH(data->blocksize);
/* kick off transfer */
bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
if ((aresp[0] & (ILLEGAL_COMMAND | APP_CMD)) != APP_CMD)
return -ENODEV;
ret = mmc_cmd(cmd, arg, resp, flags);
return ret;
}
static unsigned long
mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, void *buffer)
static int bfin_sdh_request(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
int ret, i;
unsigned long resp[4];
unsigned long card_status;
__u8 *buf = buffer;
__u32 status;
__u16 data_ctl = 0;
__u16 dma_cfg = 0;
if (blkcnt == 0)
return 0;
debug("mmc_bread: dev %d, start %d, blkcnt %d\n", dev, start, blkcnt);
/* Force to use 512-byte block,because a lot of code depends on this */
data_ctl |= 9 << 4;
data_ctl |= DTX_DIR;
bfin_write_SDH_DATA_CTL(data_ctl);
dma_cfg |= WDSIZE_32 | RESTART | WNR | DMAEN;
/* FIXME later */
bfin_write_SDH_DATA_TIMER(0xFFFFFFFF);
for (i = 0; i < blkcnt; ++i, ++start) {
blackfin_dcache_flush_invalidate_range(buf + i * mmc_blkdev.blksz,
buf + (i + 1) * mmc_blkdev.blksz);
bfin_write_DMA_START_ADDR(buf + i * mmc_blkdev.blksz);
bfin_write_DMA_X_COUNT(mmc_blkdev.blksz / 4);
bfin_write_DMA_X_MODIFY(4);
bfin_write_DMA_CONFIG(dma_cfg);
bfin_write_SDH_DATA_LGTH(mmc_blkdev.blksz);
/* Put the device into Transfer state */
ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, MMC_RSP_R1);
if (ret) {
printf("MMC_CMD_SELECT_CARD failed\n");
goto out;
}
/* Set block length */
ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, MMC_RSP_R1);
if (ret) {
printf("MMC_CMD_SET_BLOCKLEN failed\n");
goto out;
}
ret = mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK,
start * mmc_blkdev.blksz, resp,
MMC_RSP_R1);
if (ret) {
printf("MMC_CMD_READ_SINGLE_BLOCK failed\n");
goto out;
}
bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
u32 status;
int ret = 0;
ret = sdh_send_cmd(mmc, cmd);
if (ret) {
printf("sending CMD%d failed\n", cmd->cmdidx);
return ret;
}
if (data) {
ret = sdh_setup_data(mmc, data);
do {
udelay(1);
status = bfin_read_SDH_STATUS();
} while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)));
if (status & (DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)) {
bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT | \
DAT_CRC_FAIL_STAT | RX_OVERRUN_STAT);
goto read_error;
} else {
if (status & DAT_TIME_OUT) {
bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT);
ret |= TIMEOUT;
} else if (status & (DAT_CRC_FAIL | RX_OVERRUN)) {
bfin_write_SDH_STATUS_CLR(DAT_CRC_FAIL_STAT | RX_OVERRUN_STAT);
ret |= COMM_ERR;
} else
bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT);
mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, 0);
if (ret) {
printf("tranfering data failed\n");
return ret;
}
}
out:
return i;
read_error:
mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, MMC_RSP_R1);
printf("mmc: bread failed, status = %08x, card status = %08lx\n",
status, card_status);
goto out;
}
static unsigned long
mmc_bwrite(int dev, unsigned long start, lbaint_t blkcnt, const void *buffer)
{
int ret, i = 0;
unsigned long resp[4];
unsigned long card_status;
const __u8 *buf = buffer;
__u32 status;
__u16 data_ctl = 0;
__u16 dma_cfg = 0;
if (blkcnt == 0)
return 0;
debug("mmc_bwrite: dev %d, start %lx, blkcnt %lx\n",
dev, start, blkcnt);
/* Force to use 512-byte block,because a lot of code depends on this */
data_ctl |= 9 << 4;
data_ctl &= ~DTX_DIR;
bfin_write_SDH_DATA_CTL(data_ctl);
dma_cfg |= WDSIZE_32 | RESTART | DMAEN;
/* FIXME later */
bfin_write_SDH_DATA_TIMER(0xFFFFFFFF);
for (i = 0; i < blkcnt; ++i, ++start) {
bfin_write_DMA_START_ADDR(buf + i * mmc_blkdev.blksz);
bfin_write_DMA_X_COUNT(mmc_blkdev.blksz / 4);
bfin_write_DMA_X_MODIFY(4);
bfin_write_DMA_CONFIG(dma_cfg);
bfin_write_SDH_DATA_LGTH(mmc_blkdev.blksz);
/* Put the device into Transfer state */
ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, MMC_RSP_R1);
if (ret) {
printf("MMC_CMD_SELECT_CARD failed\n");
goto out;
}
/* Set block length */
ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, MMC_RSP_R1);
if (ret) {
printf("MMC_CMD_SET_BLOCKLEN failed\n");
goto out;
}
ret = mmc_cmd(MMC_CMD_WRITE_SINGLE_BLOCK,
start * mmc_blkdev.blksz, resp,
MMC_RSP_R1);
if (ret) {
printf("MMC_CMD_WRITE_SINGLE_BLOCK failed\n");
goto out;
}
bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
do {
udelay(1);
status = bfin_read_SDH_STATUS();
} while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | TX_UNDERRUN)));
if (status & (DAT_TIME_OUT | DAT_CRC_FAIL | TX_UNDERRUN)) {
bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT |
DAT_CRC_FAIL_STAT | TX_UNDERRUN_STAT);
goto write_error;
} else {
bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT);
mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, 0);
}
}
out:
return i;
write_error:
mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, MMC_RSP_R1);
printf("mmc: bwrite failed, status = %08x, card status = %08lx\n",
status, card_status);
goto out;
}
static void mmc_parse_cid(struct mmc_cid *cid, unsigned long *resp)
{
cid->mid = resp[0] >> 24;
cid->oid = (resp[0] >> 8) & 0xffff;
cid->pnm[0] = resp[0];
cid->pnm[1] = resp[1] >> 24;
cid->pnm[2] = resp[1] >> 16;
cid->pnm[3] = resp[1] >> 8;
cid->pnm[4] = resp[1];
cid->pnm[5] = resp[2] >> 24;
cid->pnm[6] = 0;
cid->prv = resp[2] >> 16;
cid->psn = (resp[2] << 16) | (resp[3] >> 16);
cid->mdt = resp[3] >> 8;
}
static void sd_parse_cid(struct mmc_cid *cid, unsigned long *resp)
{
cid->mid = resp[0] >> 24;
cid->oid = (resp[0] >> 8) & 0xffff;
cid->pnm[0] = resp[0];
cid->pnm[1] = resp[1] >> 24;
cid->pnm[2] = resp[1] >> 16;
cid->pnm[3] = resp[1] >> 8;
cid->pnm[4] = resp[1];
cid->pnm[5] = 0;
cid->pnm[6] = 0;
cid->prv = resp[2] >> 24;
cid->psn = (resp[2] << 8) | (resp[3] >> 24);
cid->mdt = (resp[3] >> 8) & 0x0fff;
}
static void mmc_dump_cid(const struct mmc_cid *cid)
{
printf("CID information:\n");
printf("Manufacturer ID: %02X\n", cid->mid);
printf("OEM/Application ID: %04X\n", cid->oid);
printf("Product name: %s\n", cid->pnm);
printf("Product Revision: %u.%u\n",
cid->prv >> 4, cid->prv & 0x0f);
printf("Product Serial Number: %lu\n", cid->psn);
printf("Manufacturing Date: %02u/%02u\n",
cid->mdt >> 4, cid->mdt & 0x0f);
}
static void mmc_dump_csd(__u32 *csd)
{
printf("CSD information:\n");
printf("CSD structure version: 1.%u\n", get_bits(csd, 126, 2));
printf("Card command classes: %03x\n", get_bits(csd, 84, 12));
printf("Max trans speed: %s\n", (get_bits(csd, 96, 8) == 0x32) ? "25MHz" : "50MHz");
printf("Read block length: %d\n", 1 << get_bits(csd, 80, 4));
printf("Write block length: %u\n", 1 << get_bits(csd, 22, 4));
printf("Card capacity: %u bytes\n",
(get_bits(csd, 62, 12) + 1) * (1 << (get_bits(csd, 47, 3) + 2)) *
(1 << get_bits(csd, 80, 4)));
putc('\n');
}
static int mmc_idle_cards(void)
{
int ret = 0;
/* Reset all cards */
ret = mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0);
if (ret)
return ret;
udelay(500);
return mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0);
}
static int sd_init_card(struct mmc_cid *cid, int verbose)
{
unsigned long resp[4];
int i, ret = 0;
mmc_idle_cards();
for (i = 0; i < 1000; ++i) {
ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND,
resp, MMC_RSP_R3);
if (ret || (resp[0] & 0x80000000))
break;
ret = -ETIMEDOUT;
}
if (ret)
return ret;
ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, MMC_RSP_R2);
if (ret)
return ret;
sd_parse_cid(cid, resp);
if (verbose)
mmc_dump_cid(cid);
/* Get RCA of the card that responded */
ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, MMC_RSP_R6);
if (ret)
return ret;
mmc_rca = (resp[0] >> 16) & 0xffff;
if (verbose)
printf("SD Card detected (RCA %u)\n", mmc_rca);
mmc_card_is_sd = 1;
return 0;
}
static int mmc_init_card(struct mmc_cid *cid, int verbose)
static void sdh_set_clk(unsigned long clk)
{
unsigned long resp[4];
int i, ret = 0;
unsigned long sys_clk;
unsigned long clk_div;
u16 clk_ctl = 0;
mmc_idle_cards();
for (i = 0; i < 1000; ++i) {
ret = mmc_cmd(MMC_CMD_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND, resp,
MMC_RSP_R3);
if (ret || (resp[0] & 0x80000000))
break;
ret = -ETIMEDOUT;
}
if (ret)
return ret;
clk_ctl = bfin_read_SDH_CLK_CTL();
if (clk) {
/* setting SD_CLK */
sys_clk = get_sclk();
bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E);
if (sys_clk % (2 * clk) == 0)
clk_div = sys_clk / (2 * clk) - 1;
else
clk_div = sys_clk / (2 * clk);
/* Get CID of all cards. FIXME: Support more than one card */
ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, MMC_RSP_R2);
if (ret)
return ret;
mmc_parse_cid(cid, resp);
if (verbose)
mmc_dump_cid(cid);
/* Set Relative Address of the card that responded */
ret = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, mmc_rca << 16, resp,
MMC_RSP_R1);
return ret;
if (clk_div > 0xff)
clk_div = 0xff;
clk_ctl |= (clk_div & 0xff);
clk_ctl |= CLK_E;
bfin_write_SDH_CLK_CTL(clk_ctl);
} else
bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E);
}
int mmc_legacy_init(int verbose)
static void bfin_sdh_set_ios(struct mmc *mmc)
{
__u16 pwr_ctl = 0;
int ret;
unsigned int max_blksz;
/* Initialize sdh controller */
u16 cfg = 0;
u16 clk_ctl = 0;
if (mmc->bus_width == 4) {
cfg = bfin_read_SDH_CFG();
cfg &= ~0x80;
cfg |= 0x40;
bfin_write_SDH_CFG(cfg);
clk_ctl |= WIDE_BUS;
}
bfin_write_SDH_CLK_CTL(clk_ctl);
sdh_set_clk(mmc->clock);
}
static int bfin_sdh_init(struct mmc *mmc)
{
u16 pwr_ctl = 0;
/* Initialize sdh controller */
#if defined(__ADSPBF54x__)
bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1);
bfin_write_PORTC_FER(bfin_read_PORTC_FER() | 0x3F00);
@ -481,56 +224,34 @@ int mmc_legacy_init(int verbose)
bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN);
/* Disable card detect pin */
bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | 0x60);
mci_set_clk(CONFIG_SYS_MMC_CLK_ID);
/* setting power control */
pwr_ctl |= ROD_CTL;
pwr_ctl |= PWR_ON;
bfin_write_SDH_PWR_CTL(pwr_ctl);
mmc_card_is_sd = 0;
ret = sd_init_card(&cid, verbose);
if (ret) {
mmc_rca = MMC_DEFAULT_RCA;
ret = mmc_init_card(&cid, verbose);
}
if (ret)
return ret;
/* Get CSD from the card */
ret = mmc_cmd(MMC_CMD_SEND_CSD, mmc_rca << 16, csd, MMC_RSP_R2);
if (ret)
return ret;
if (verbose)
mmc_dump_csd(csd);
/* Initialize the blockdev structure */
mmc_blkdev.if_type = IF_TYPE_MMC;
mmc_blkdev.part_type = PART_TYPE_DOS;
mmc_blkdev.block_read = mmc_bread;
mmc_blkdev.block_write = mmc_bwrite;
sprintf(mmc_blkdev.vendor,
"Man %02x%04x Snr %08lx",
cid.mid, cid.oid, cid.psn);
strncpy(mmc_blkdev.product, cid.pnm,
sizeof(mmc_blkdev.product));
sprintf(mmc_blkdev.revision, "%x %x",
cid.prv >> 4, cid.prv & 0x0f);
max_blksz = 1 << get_bits(csd, 80, 4);
/*
* If we can't use 512 byte blocks, refuse to deal with the
* card. Tons of code elsewhere seems to depend on this.
*/
if (max_blksz < 512 || (max_blksz > 512 && !get_bits(csd, 79, 1))) {
printf("Card does not support 512 byte reads, aborting.\n");
return -ENODEV;
}
mmc_blkdev.blksz = 512;
mmc_blkdev.lba = (get_bits(csd, 62, 12) + 1) * (1 << (get_bits(csd, 47, 3) + 2));
mci_set_clk(CONFIG_SYS_MMC_CLK_OP);
init_part(&mmc_blkdev);
return 0;
}
int mmc2info(ulong addr)
int bfin_mmc_init(bd_t *bis)
{
struct mmc *mmc = NULL;
mmc = malloc(sizeof(struct mmc));
if (!mmc)
return -ENOMEM;
sprintf(mmc->name, "Blackfin SDH");
mmc->send_cmd = bfin_sdh_request;
mmc->set_ios = bfin_sdh_set_ios;
mmc->init = bfin_sdh_init;
mmc->host_caps = MMC_MODE_4BIT;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->f_max = get_sclk();
mmc->f_min = mmc->f_max >> 9;
mmc->block_dev.part_type = PART_TYPE_DOS;
mmc_register(mmc);
return 0;
}

59
drivers/mmc/bfin_sdh.h
View file

@ -1,59 +0,0 @@
/*
* Copyright (C) 2008 Analog Device Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __BLACKFIN_SDH_H__
#define __BLACKFIN_SDH_H__
#define MMC_RSP_PRESENT (1 << 0)
#define MMC_RSP_136 (1 << 1) /* 136 bit response */
#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
#define MMC_CMD_AC (0 << 5)
#define MMC_CMD_ADTC (1 << 5)
#define MMC_CMD_BC (2 << 5)
#define MMC_CMD_BCR (3 << 5)
#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
/*
* These are the native response types, and correspond to valid bit
* patterns of the above flags. One additional valid pattern
* is all zeros, which means we don't expect a response.
*/
#define MMC_RSP_NONE (0)
#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
#define MMC_RSP_R3 (MMC_RSP_PRESENT)
#define MMC_RSP_R4 (MMC_RSP_PRESENT)
#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define ILLEGAL_COMMAND (1 << 22)
#define APP_CMD (1 << 5)
#endif

1
include/asm-blackfin/mmc.h
View file

@ -1 +0,0 @@
#include <asm-avr32/arch-at32ap700x/mmc.h>

17
include/asm-blackfin/sdh.h Normal file
View file

@ -0,0 +1,17 @@
/*
* sdh.h, export bfin_mmc_init
*
* Copyright (c) 2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef __ASM_SDH_H__
#define __ASM_SDH_H__
#include <mmc.h>
#include <asm/u-boot.h>
int bfin_mmc_init(bd_t *bis);
#endif

1
include/configs/bf518f-ezbrd.h
View file

@ -125,6 +125,7 @@
* SDH Settings
*/
#if !defined(__ADSPBF512__)
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_BFIN_SDH
#endif

1
include/configs/bf548-ezkit.h
View file

@ -161,6 +161,7 @@
* SDH Settings
*/
#if !defined(__ADSPBF544__)
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_BFIN_SDH
#endif

6
lib_blackfin/board.c
View file

@ -14,6 +14,7 @@
#include <stdio_dev.h>
#include <environment.h>
#include <malloc.h>
#include <mmc.h>
#include <net.h>
#include <timestamp.h>
#include <status_led.h>
@ -340,6 +341,11 @@ void board_init_r(gd_t * id, ulong dest_addr)
nand_init(); /* go init the NAND */
#endif
#ifdef CONFIG_GENERIC_MMC
puts("MMC: ");
mmc_initialize(bd);
#endif
/* relocate environment function pointers etc. */
env_relocate();