x86: braswell: Add microcode for B0/C0/D0 stepping SoC

Browse source

This adds microcode device tree fragment for Braswell B0 (406C2),
C0 (406C3) and D0 (406C4) stepping SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

...

This commit is contained in:

Bin Meng 2017-08-15 22:41:59 -07:00

parent de9ac9a1b9

commit e61a2687b3

3 changed files with 12924 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Show stats Download patch file Download diff file Expand all files Collapse all files

4308

arch/x86/dts/microcode/m01406c2220.dtsi Normal file

View file

File diff suppressed because it is too large Load diff

4308

arch/x86/dts/microcode/m01406c3363.dtsi Normal file

View file

File diff suppressed because it is too large Load diff

4308

arch/x86/dts/microcode/m01406c440a.dtsi Normal file

View file

File diff suppressed because it is too large Load diff