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pci: Add functions to read and write a BAR address
Some PCI functions cannot be auto-configured. Add a function to set up a fixed BAR which can be used in these situations. Also add a function to read the current address of a BAR. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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2 changed files with 44 additions and 3 deletions
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@ -366,9 +366,27 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
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return phys_addr;
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}
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/*
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*
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*/
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void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
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u32 addr_and_ctrl)
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{
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int bar;
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bar = PCI_BASE_ADDRESS_0 + barnum * 4;
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pci_hose_write_config_dword(hose, dev, bar, addr_and_ctrl);
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}
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u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum)
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{
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u32 addr;
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int bar;
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bar = PCI_BASE_ADDRESS_0 + barnum * 4;
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pci_hose_read_config_dword(hose, dev, bar, &addr);
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if (addr & PCI_BASE_ADDRESS_SPACE_IO)
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return addr & PCI_BASE_ADDRESS_IO_MASK;
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else
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return addr & PCI_BASE_ADDRESS_MEM_MASK;
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}
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int pci_hose_config_device(struct pci_controller *hose,
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pci_dev_t dev,
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@ -678,5 +678,28 @@ extern void pci_mpc824x_init (struct pci_controller *hose);
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extern void pci_mpc85xx_init (struct pci_controller *hose);
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#endif
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/**
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* pci_write_bar32() - Write the address of a BAR including control bits
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*
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* This writes a raw address (with control bits) to a bar
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*
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* @hose: PCI hose to use
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* @dev: PCI device to update
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* @barnum: BAR number (0-5)
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* @addr: BAR address with control bits
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*/
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void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
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u32 addr_and_ctrl);
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/**
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* pci_read_bar32() - read the address of a bar
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*
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* @hose: PCI hose to use
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* @dev: PCI device to inspect
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* @barnum: BAR number (0-5)
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* @return address of the bar, masking out any control bits
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* */
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u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
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#endif /* __ASSEMBLY__ */
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#endif /* _PCI_H */
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