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usb: spear: Add support for both SPEAr600 EHCI controllers

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USB EHCI on SPEAr600 has not been tested for a while. The base controller
addresses are missing. This patch adds the defines to the header. And adds
the missing code.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Cc: Marek Vasut <marex@denx.de>
This commit is contained in:
Stefan Roese 2015-08-18 09:27:18 +02:00 • committed by Marek Vasut
parent f0c89d5463
commit e8d056989a
3 changed files with 41 additions and 3 deletions
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4
arch/arm/cpu/arm926ejs/spear/cpu.c
View file

@ -47,8 +47,12 @@ int arch_cpu_init(void)
#if defined(CONFIG_NAND_FSMC)
periph1_clken |= MISC_FSMCENB;
#endif
#if defined(CONFIG_USB_EHCI_SPEAR)
periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
#endif
writel(periph1_clken, &misc_p->periph1_clken);
return 0;
}

2
arch/arm/include/asm/arch-spear/hardware.h
View file

@ -11,6 +11,8 @@
#define CONFIG_SYS_USBD_BASE 0xE1100000
#define CONFIG_SYS_PLUG_BASE 0xE1200000
#define CONFIG_SYS_FIFO_BASE 0xE1000800
#define CONFIG_SYS_UHC0_EHCI_BASE 0xE1800000
#define CONFIG_SYS_UHC1_EHCI_BASE 0xE2000000
#define CONFIG_SYS_SMI_BASE 0xFC000000
#define CONFIG_SPEAR_SYSCNTLBASE 0xFCA00000
#define CONFIG_SPEAR_TIMERBASE 0xFC800000

38
drivers/usb/host/ehci-spear.c
View file

@ -14,7 +14,21 @@
#include <usb.h>
#include "ehci.h"
#include <asm/arch/hardware.h>
#include <asm/arch/spr_misc.h>
static void spear6xx_usbh_stop(void)
{
struct misc_regs *const misc_p =
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
u32 periph1_rst = readl(misc_p->periph1_rst);
periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
writel(periph1_rst, misc_p->periph1_rst);
udelay(1000);
periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
writel(periph1_rst, misc_p->periph1_rst);
}
/*
* Create the appropriate control structures to manage
@ -23,9 +37,23 @@
int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
*hccr = (struct ehci_hccr *)(CONFIG_SYS_UHC0_EHCI_BASE + 0x100);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr
+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
u32 ehci = 0;
switch (index) {
case 0:
ehci = CONFIG_SYS_UHC0_EHCI_BASE;
break;
case 1:
ehci = CONFIG_SYS_UHC1_EHCI_BASE;
break;
default:
printf("ERROR: wrong controller index!\n");
break;
};
*hccr = (struct ehci_hccr *)(ehci + 0x100);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
(uint32_t)*hccr, (uint32_t)*hcor,
@ -40,5 +68,9 @@ int ehci_hcd_init(int index, enum usb_init_type init,
*/
int ehci_hcd_stop(int index)
{
#if defined(CONFIG_SPEAR600)
spear6xx_usbh_stop();
#endif
return 0;
}