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arm64: zynqmp: Enable FPGA loading from SPL

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fpga bitstream needs to be listed in config node in FIT image. Only tested
option is bitstream in BIN format.
Enabling this feature increase code size by almost 4k.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2020-10-05 15:43:44 +02:00
parent 0d76b71d93
commit e928406695
1 changed files with 1 additions and 0 deletions
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configs/xilinx_zynqmp_virt_defconfig
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@ -19,6 +19,7 @@ CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_FPGA=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y