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sh: r2dplus: Switch to DM PCI driver

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Add DT entry for the DM PCI driver, update board configs
and drop ad-hoc board init code for the PCI bus. Instead,
let the DM PCI driver initialize and operate the hardware.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2019-08-31 18:25:21 +02:00 • committed by Marek Vasut
parent 72c2f4acd7
commit eaae4ee2bd
4 changed files with 16 additions and 20 deletions
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14
arch/sh/dts/sh7751-r2dplus.dts
View file

@ -9,4 +9,18 @@
/ { / {
model = "R2D"; model = "R2D";
compatible = "renesas,r2d", "renesas,sh7751"; compatible = "renesas,r2d", "renesas,sh7751";
pci@fe200000 {
compatible = "renesas,pci-sh7751";
device_type = "pci";
reg = <0 0xfe200000 0 0x1000>;
status = "okay";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x01000000 0 0xfe240000 0 0xfe240000 0 0x00040000
0x02000000 0 0xfd000000 0 0xfd000000 0 0x01000000>;
};
}; };

7
board/renesas/r2dplus/r2dplus.c
View file

@ -9,7 +9,6 @@
#include <netdev.h> #include <netdev.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/pci.h>
int checkboard(void) int checkboard(void)
{ {
@ -45,12 +44,6 @@ void ide_set_reset(int idereset)
} }
} }
static struct pci_controller hose;
void pci_init_board(void)
{
pci_sh7751_init(&hose);
}
int board_eth_init(bd_t *bis) int board_eth_init(bd_t *bis)
{ {
return pci_eth_init(bis); return pci_eth_init(bis);

2
configs/r2dplus_defconfig
View file

@ -25,5 +25,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_RTL8139=y CONFIG_RTL8139=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_SCIF_CONSOLE=y CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_USE_PRIVATE_LIBGCC=y

13
include/configs/r2dplus.h
View file

@ -64,19 +64,6 @@
/* /*
* SuperH PCI Bridge Configration * SuperH PCI Bridge Configration
*/ */
#define CONFIG_SH4_PCI
#define CONFIG_SH7751_PCI #define CONFIG_SH7751_PCI
#define CONFIG_PCI_SCAN_SHOW 1
#define __mem_pci
#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */
#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */