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net: designware: Fix alignment of buffer descriptors
It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.
If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.
Commit ef76025a99
"net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.
Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Patch: 277902
This commit is contained in:
parent
227ad7b2b6
commit
ed102be70f
1 changed files with 3 additions and 4 deletions
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@ -112,7 +112,7 @@ struct dmamacdescr {
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u32 dmamac_cntl;
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u32 dmamac_cntl;
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void *dmamac_addr;
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void *dmamac_addr;
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struct dmamacdescr *dmamac_next;
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struct dmamacdescr *dmamac_next;
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};
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} __aligned(16);
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/*
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/*
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* txrx_status definitions
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* txrx_status definitions
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@ -224,8 +224,7 @@ struct dw_eth_dev {
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u32 tx_currdescnum;
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u32 tx_currdescnum;
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u32 rx_currdescnum;
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u32 rx_currdescnum;
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u32 phy_configured;
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u32 phy_configured;
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int link_printed;
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u32 link_printed;
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u32 padding;
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struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
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struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
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struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM];
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struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM];
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@ -237,7 +236,7 @@ struct dw_eth_dev {
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struct eth_dma_regs *dma_regs_p;
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struct eth_dma_regs *dma_regs_p;
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struct eth_device *dev;
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struct eth_device *dev;
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} __attribute__ ((aligned(8)));
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};
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/* Speed specific definitions */
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/* Speed specific definitions */
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#define SPEED_10M 1
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#define SPEED_10M 1
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