mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-27 17:41:34 +00:00
Merge branch 'lwmon5' of /home/wd/git/u-boot/projects
This commit is contained in:
commit
eddc7c46c6
20 changed files with 155 additions and 8 deletions
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@ -107,7 +107,7 @@ void logbuff_init_ptrs (void)
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||||||
if ((s = getenv ("loglevel")) != NULL)
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if ((s = getenv ("loglevel")) != NULL)
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console_loglevel = (int)simple_strtoul (s, NULL, 10);
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console_loglevel = (int)simple_strtoul (s, NULL, 10);
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gd->post_log_word |= LOGBUFF_INITIALIZED;
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gd->flags |= GD_FLG_LOGINIT;
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}
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}
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void logbuff_reset (void)
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void logbuff_reset (void)
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@ -168,7 +168,7 @@ static void logbuff_puts (const char *s)
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void logbuff_log(char *msg)
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void logbuff_log(char *msg)
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{
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{
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if ((gd->post_log_word & LOGBUFF_INITIALIZED)) {
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if ((gd->flags & GD_FLG_LOGINIT)) {
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logbuff_printk (msg);
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logbuff_printk (msg);
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} else {
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} else {
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/* Can happen only for pre-relocated errors as logging */
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/* Can happen only for pre-relocated errors as logging */
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|
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@ -61,6 +61,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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|
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")
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|
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@ -52,6 +52,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buf has been initialized */
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5")
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5")
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|
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@ -62,6 +62,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buf has been initialized */
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#define DECLARE_GLOBAL_DATA_PTR register gd_t * volatile gd asm ("P5")
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#define DECLARE_GLOBAL_DATA_PTR register gd_t * volatile gd asm ("P5")
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|
|
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@ -55,6 +55,8 @@ typedef struct {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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|
|
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extern gd_t *global_data;
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extern gd_t *global_data;
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|
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||||||
|
|
|
@ -73,6 +73,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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#if 0
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#if 0
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extern gd_t *global_data;
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extern gd_t *global_data;
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|
|
|
@ -53,6 +53,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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||||||
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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|
|
||||||
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31")
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31")
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|
|
||||||
|
|
|
@ -55,6 +55,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
|
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buf has been initialized */
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||||||
|
|
||||||
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")
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|
||||||
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|
|
@ -46,6 +46,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
|
#define GD_FLG_SILENT 0x00004 /* Silent mode */
|
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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|
|
||||||
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7")
|
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7")
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||||||
|
|
||||||
|
|
|
@ -45,6 +45,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
|
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
|
||||||
#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
|
||||||
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
|
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
|
||||||
|
#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
|
||||||
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
|
||||||
|
|
||||||
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")
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||||||
|
|
||||||
|
|
|
@ -168,6 +168,8 @@ typedef struct global_data {
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
|
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
|
||||||
|
#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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|
|
||||||
#if 1
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#if 1
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
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|
|
@ -45,6 +45,8 @@ typedef struct global_data
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
|
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
|
||||||
#define GD_FLG_SILENT 0x00004 /* Silent mode */
|
#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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||||||
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
|
||||||
|
|
||||||
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13")
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13")
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||||||
|
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||||||
|
|
|
@ -79,6 +79,9 @@ typedef struct global_data {
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#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
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#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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|
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||||||
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("%g7")
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("%g7")
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||||||
|
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||||||
|
|
|
@ -88,15 +88,20 @@
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/* unused GPT0 COMP reg */
|
/* unused GPT0 COMP reg */
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#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */
|
#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */
|
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/* 440EPx errata CHIP 11 */
|
/* 440EPx errata CHIP 11 */
|
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|
#define CFG_OCM_SIZE (16 << 10)
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|
|
||||||
/* Additional registers for watchdog timer post test */
|
/* Additional registers for watchdog timer post test */
|
||||||
|
|
||||||
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2)
|
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2)
|
||||||
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1)
|
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1)
|
||||||
#define CFG_DSPIC_TEST_ADDR CFG_WATCHDOG_FLAGS_ADDR
|
#define CFG_DSPIC_TEST_ADDR CFG_WATCHDOG_FLAGS_ADDR
|
||||||
|
#define CFG_OCM_STATUS_ADDR CFG_WATCHDOG_FLAGS_ADDR
|
||||||
#define CFG_WATCHDOG_MAGIC 0x12480000
|
#define CFG_WATCHDOG_MAGIC 0x12480000
|
||||||
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
|
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
|
||||||
#define CFG_DSPIC_TEST_MASK 0x00000001
|
#define CFG_DSPIC_TEST_MASK 0x00000001
|
||||||
|
#define CFG_OCM_STATUS_OK 0x00009A00
|
||||||
|
#define CFG_OCM_STATUS_FAIL 0x0000A300
|
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|
#define CFG_OCM_STATUS_MASK 0x0000FF00
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
* Serial Port
|
* Serial Port
|
||||||
|
@ -162,6 +167,7 @@
|
||||||
CFG_POST_FPU | \
|
CFG_POST_FPU | \
|
||||||
CFG_POST_I2C | \
|
CFG_POST_I2C | \
|
||||||
CFG_POST_MEMORY | \
|
CFG_POST_MEMORY | \
|
||||||
|
CFG_POST_OCM | \
|
||||||
CFG_POST_RTC | \
|
CFG_POST_RTC | \
|
||||||
CFG_POST_SPR | \
|
CFG_POST_SPR | \
|
||||||
CFG_POST_UART | \
|
CFG_POST_UART | \
|
||||||
|
|
|
@ -31,8 +31,6 @@
|
||||||
#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
|
#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
|
||||||
#define LOGBUFF_RESERVE (LOGBUFF_LEN+LOGBUFF_OVERHEAD)
|
#define LOGBUFF_RESERVE (LOGBUFF_LEN+LOGBUFF_OVERHEAD)
|
||||||
|
|
||||||
#define LOGBUFF_INITIALIZED (1<<31)
|
|
||||||
|
|
||||||
/* The mapping used here has to be the same as in setup_ext_logbuff ()
|
/* The mapping used here has to be the same as in setup_ext_logbuff ()
|
||||||
in linux/kernel/printk */
|
in linux/kernel/printk */
|
||||||
|
|
||||||
|
|
|
@ -43,6 +43,7 @@
|
||||||
#define POST_PREREL 0x1000 /* test runs before relocation */
|
#define POST_PREREL 0x1000 /* test runs before relocation */
|
||||||
|
|
||||||
#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
|
#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
|
||||||
|
#define POST_STOP 0x4000 /* Interrupt POST sequence on fail */
|
||||||
|
|
||||||
#define POST_MEM (POST_RAM | POST_ROM)
|
#define POST_MEM (POST_RAM | POST_ROM)
|
||||||
#define POST_ALWAYS (POST_NORMAL | \
|
#define POST_ALWAYS (POST_NORMAL | \
|
||||||
|
@ -94,7 +95,7 @@ extern int post_hotkeys_pressed(void);
|
||||||
#define CFG_POST_SPR 0x00000400
|
#define CFG_POST_SPR 0x00000400
|
||||||
#define CFG_POST_SYSMON 0x00000800
|
#define CFG_POST_SYSMON 0x00000800
|
||||||
#define CFG_POST_DSP 0x00001000
|
#define CFG_POST_DSP 0x00001000
|
||||||
#define CFG_POST_CODEC 0x00002000
|
#define CFG_POST_OCM 0x00002000
|
||||||
#define CFG_POST_FPU 0x00004000
|
#define CFG_POST_FPU 0x00004000
|
||||||
#define CFG_POST_ECC 0x00008000
|
#define CFG_POST_ECC 0x00008000
|
||||||
#define CFG_POST_BSPEC1 0x00010000
|
#define CFG_POST_BSPEC1 0x00010000
|
||||||
|
@ -102,6 +103,7 @@ extern int post_hotkeys_pressed(void);
|
||||||
#define CFG_POST_BSPEC3 0x00040000
|
#define CFG_POST_BSPEC3 0x00040000
|
||||||
#define CFG_POST_BSPEC4 0x00080000
|
#define CFG_POST_BSPEC4 0x00080000
|
||||||
#define CFG_POST_BSPEC5 0x00100000
|
#define CFG_POST_BSPEC5 0x00100000
|
||||||
|
#define CFG_POST_CODEC 0x00200000
|
||||||
|
|
||||||
#endif /* CONFIG_POST */
|
#endif /* CONFIG_POST */
|
||||||
|
|
||||||
|
|
|
@ -29,6 +29,7 @@ COBJS-$(CONFIG_HAS_POST) += cache.o
|
||||||
COBJS-$(CONFIG_HAS_POST) += denali_ecc.o
|
COBJS-$(CONFIG_HAS_POST) += denali_ecc.o
|
||||||
COBJS-$(CONFIG_HAS_POST) += ether.o
|
COBJS-$(CONFIG_HAS_POST) += ether.o
|
||||||
COBJS-$(CONFIG_HAS_POST) += fpu.o
|
COBJS-$(CONFIG_HAS_POST) += fpu.o
|
||||||
|
COBJS-$(CONFIG_HAS_POST) += ocm.o
|
||||||
COBJS-$(CONFIG_HAS_POST) += spr.o
|
COBJS-$(CONFIG_HAS_POST) += spr.o
|
||||||
COBJS-$(CONFIG_HAS_POST) += uart.o
|
COBJS-$(CONFIG_HAS_POST) += uart.o
|
||||||
COBJS-$(CONFIG_HAS_POST) += watchdog.o
|
COBJS-$(CONFIG_HAS_POST) += watchdog.o
|
||||||
|
|
89
post/cpu/ppc4xx/ocm.c
Normal file
89
post/cpu/ppc4xx/ocm.c
Normal file
|
@ -0,0 +1,89 @@
|
||||||
|
/*
|
||||||
|
* (C) Copyright 2008 Ilya Yanok, EmCraft Systems, yanok@emcraft.com
|
||||||
|
*
|
||||||
|
* Developed for DENX Software Engineering GmbH
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
* MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
#include <common.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This test attempts to verify on-chip memory (OCM). Result is written
|
||||||
|
* to the scratch register and if test succeed it won't be run till next
|
||||||
|
* power on.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <post.h>
|
||||||
|
|
||||||
|
#include <asm/io.h>
|
||||||
|
|
||||||
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
|
#define OCM_TEST_PATTERN1 0x55555555
|
||||||
|
#define OCM_TEST_PATTERN2 0xAAAAAAAA
|
||||||
|
|
||||||
|
#if CONFIG_POST & CFG_POST_OCM
|
||||||
|
|
||||||
|
static uint ocm_status_read(void)
|
||||||
|
{
|
||||||
|
return in_be32((void *)CFG_OCM_STATUS_ADDR) &
|
||||||
|
CFG_OCM_STATUS_MASK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void ocm_status_write(uint value)
|
||||||
|
{
|
||||||
|
out_be32((void *)CFG_OCM_STATUS_ADDR, value |
|
||||||
|
(in_be32((void *)CFG_OCM_STATUS_ADDR) &
|
||||||
|
~CFG_OCM_STATUS_MASK));
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int ocm_test_word(uint value, uint *address)
|
||||||
|
{
|
||||||
|
uint read_value;
|
||||||
|
|
||||||
|
*address = value;
|
||||||
|
sync();
|
||||||
|
read_value = *address;
|
||||||
|
|
||||||
|
return (read_value != value);
|
||||||
|
}
|
||||||
|
|
||||||
|
int ocm_post_test(int flags)
|
||||||
|
{
|
||||||
|
uint old_value;
|
||||||
|
int ret = 0;
|
||||||
|
uint *address = (uint*)CFG_OCM_BASE;
|
||||||
|
|
||||||
|
if (ocm_status_read() == CFG_OCM_STATUS_OK)
|
||||||
|
return 0;
|
||||||
|
for (; address < (uint*)(CFG_OCM_BASE + CFG_OCM_SIZE); address++) {
|
||||||
|
old_value = *address;
|
||||||
|
if (ocm_test_word(OCM_TEST_PATTERN1, address) ||
|
||||||
|
ocm_test_word(OCM_TEST_PATTERN2, address)) {
|
||||||
|
ret = 1;
|
||||||
|
*address = old_value;
|
||||||
|
printf("OCM POST failed at %p!\n", address);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
*address = old_value;
|
||||||
|
}
|
||||||
|
ocm_status_write(ret ? CFG_OCM_STATUS_FAIL : CFG_OCM_STATUS_OK);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
#endif /* CONFIG_POST & CFG_POST_OCM */
|
17
post/post.c
17
post/post.c
|
@ -238,14 +238,20 @@ static int post_run_single (struct post_test *test,
|
||||||
if (test_flags & POST_PREREL) {
|
if (test_flags & POST_PREREL) {
|
||||||
if ((*test->test) (flags) == 0)
|
if ((*test->test) (flags) == 0)
|
||||||
post_log_mark_succ ( test->testid );
|
post_log_mark_succ ( test->testid );
|
||||||
else if (test_flags & POST_CRITICAL)
|
else {
|
||||||
gd->flags |= GD_FLG_POSTFAIL;
|
if (test_flags & POST_CRITICAL)
|
||||||
|
gd->flags |= GD_FLG_POSTFAIL;
|
||||||
|
if (test_flags & POST_STOP)
|
||||||
|
gd->flags |= GD_FLG_POSTSTOP;
|
||||||
|
}
|
||||||
} else {
|
} else {
|
||||||
if ((*test->test) (flags) != 0) {
|
if ((*test->test) (flags) != 0) {
|
||||||
post_log ("FAILED\n");
|
post_log ("FAILED\n");
|
||||||
show_boot_progress (-32);
|
show_boot_progress (-32);
|
||||||
if (test_flags & POST_CRITICAL)
|
if (test_flags & POST_CRITICAL)
|
||||||
gd->flags |= GD_FLG_POSTFAIL;
|
gd->flags |= GD_FLG_POSTFAIL;
|
||||||
|
if (test_flags & POST_STOP)
|
||||||
|
gd->flags |= GD_FLG_POSTSTOP;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
post_log ("PASSED\n");
|
post_log ("PASSED\n");
|
||||||
|
@ -271,6 +277,9 @@ int post_run (char *name, int flags)
|
||||||
if (name == NULL) {
|
if (name == NULL) {
|
||||||
unsigned int last;
|
unsigned int last;
|
||||||
|
|
||||||
|
if (gd->flags & GD_FLG_POSTSTOP)
|
||||||
|
return 0;
|
||||||
|
|
||||||
if (post_bootmode_get (&last) & POST_POWERTEST) {
|
if (post_bootmode_get (&last) & POST_POWERTEST) {
|
||||||
if (last & POST_FAIL_SAVE) {
|
if (last & POST_FAIL_SAVE) {
|
||||||
last &= ~POST_FAIL_SAVE;
|
last &= ~POST_FAIL_SAVE;
|
||||||
|
@ -285,6 +294,8 @@ int post_run (char *name, int flags)
|
||||||
flags | POST_REBOOT, last);
|
flags | POST_REBOOT, last);
|
||||||
|
|
||||||
for (i = last + 1; i < post_list_size; i++) {
|
for (i = last + 1; i < post_list_size; i++) {
|
||||||
|
if (gd->flags & GD_FLG_POSTSTOP)
|
||||||
|
break;
|
||||||
post_run_single (post_list + i,
|
post_run_single (post_list + i,
|
||||||
test_flags[i],
|
test_flags[i],
|
||||||
flags, i);
|
flags, i);
|
||||||
|
@ -292,6 +303,8 @@ int post_run (char *name, int flags)
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
for (i = 0; i < post_list_size; i++) {
|
for (i = 0; i < post_list_size; i++) {
|
||||||
|
if (gd->flags & GD_FLG_POSTSTOP)
|
||||||
|
break;
|
||||||
post_run_single (post_list + i,
|
post_run_single (post_list + i,
|
||||||
test_flags[i],
|
test_flags[i],
|
||||||
flags, i);
|
flags, i);
|
||||||
|
|
15
post/tests.c
15
post/tests.c
|
@ -29,6 +29,7 @@
|
||||||
|
|
||||||
#include <post.h>
|
#include <post.h>
|
||||||
|
|
||||||
|
extern int ocm_post_test (int flags);
|
||||||
extern int cache_post_test (int flags);
|
extern int cache_post_test (int flags);
|
||||||
extern int watchdog_post_test (int flags);
|
extern int watchdog_post_test (int flags);
|
||||||
extern int i2c_post_test (int flags);
|
extern int i2c_post_test (int flags);
|
||||||
|
@ -60,6 +61,18 @@ extern void sysmon_reloc (void);
|
||||||
|
|
||||||
struct post_test post_list[] =
|
struct post_test post_list[] =
|
||||||
{
|
{
|
||||||
|
#if CONFIG_POST & CFG_POST_OCM
|
||||||
|
{
|
||||||
|
"OCM test",
|
||||||
|
"ocm",
|
||||||
|
"This test checks on chip memory (OCM).",
|
||||||
|
POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
|
||||||
|
&ocm_post_test,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
CFG_POST_OCM
|
||||||
|
},
|
||||||
|
#endif
|
||||||
#if CONFIG_POST & CFG_POST_CACHE
|
#if CONFIG_POST & CFG_POST_CACHE
|
||||||
{
|
{
|
||||||
"Cache test",
|
"Cache test",
|
||||||
|
@ -270,7 +283,7 @@ struct post_test post_list[] =
|
||||||
#if CONFIG_POST & CFG_POST_BSPEC4
|
#if CONFIG_POST & CFG_POST_BSPEC4
|
||||||
CONFIG_POST_BSPEC4,
|
CONFIG_POST_BSPEC4,
|
||||||
#endif
|
#endif
|
||||||
#if CONFIG_POST & CFG_POST_BSPEC4
|
#if CONFIG_POST & CFG_POST_BSPEC5
|
||||||
CONFIG_POST_BSPEC5,
|
CONFIG_POST_BSPEC5,
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
Loading…
Add table
Reference in a new issue