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MIPS: add initial infrastructure for Broadcom MIPS SoCs
CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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7 changed files with 104 additions and 0 deletions
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@ -75,6 +75,15 @@ config ARCH_ATH79
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select OF_CONTROL
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select DM
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config ARCH_BMIPS
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bool "Support BMIPS SoCs"
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select OF_CONTROL
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select DM
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select CLK
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select CPU
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select RAM
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select SYSRESET
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config MACH_PIC32
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bool "Support Microchip PIC32"
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select OF_CONTROL
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@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig"
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source "board/pb1x00/Kconfig"
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source "board/qemu-mips/Kconfig"
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source "arch/mips/mach-ath79/Kconfig"
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source "arch/mips/mach-bmips/Kconfig"
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source "arch/mips/mach-pic32/Kconfig"
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if MIPS
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@ -15,6 +15,7 @@ libs-y += arch/mips/lib/
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machine-$(CONFIG_SOC_AU1X00) += au1x00
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machine-$(CONFIG_ARCH_ATH79) += ath79
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machine-$(CONFIG_ARCH_BMIPS) += bmips
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machine-$(CONFIG_MACH_PIC32) += pic32
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machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
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@ -151,8 +151,13 @@ reset:
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mfc0 t0, CP0_GLOBALNUMBER
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#endif
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#ifdef CONFIG_ARCH_BMIPS
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1: mfc0 t0, CP0_DIAGNOSTIC, 3
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and t0, t0, (1 << 31)
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#else
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1: mfc0 t0, CP0_EBASE
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and t0, t0, EBASE_CPUNUM
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#endif
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/* Hang if this isn't the first CPU in the system */
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2: beqz t0, 4f
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23
arch/mips/mach-bmips/Kconfig
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23
arch/mips/mach-bmips/Kconfig
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@ -0,0 +1,23 @@
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menu "Broadcom MIPS platforms"
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depends on ARCH_BMIPS
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config SYS_SOC
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default "none"
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choice
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prompt "Boot mode"
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config BMIPS_BOOT_RAM
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bool "RAM boot"
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depends on BMIPS_SUPPORTS_BOOT_RAM
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help
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This builds an image that is linked to a RAM address. It can be used
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for booting from CFE via TFTP using an ELF image, but it can also be
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booted from RAM by other bootloaders using a BIN image.
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endchoice
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config BMIPS_SUPPORTS_BOOT_RAM
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bool
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endmenu
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5
arch/mips/mach-bmips/Makefile
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5
arch/mips/mach-bmips/Makefile
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@ -0,0 +1,5 @@
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += dram.o
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37
arch/mips/mach-bmips/dram.c
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37
arch/mips/mach-bmips/dram.c
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@ -0,0 +1,37 @@
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/*
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* Copyright (C) 2016 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <ram.h>
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#include <dm.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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struct ram_info ram;
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struct udevice *dev;
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int err;
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err = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (err) {
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debug("DRAM init failed: %d\n", err);
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return 0;
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}
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err = ram_get_info(dev, &ram);
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if (err) {
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debug("Cannot get DRAM size: %d\n", err);
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return 0;
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}
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debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
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gd->ram_size = ram.size;
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return 0;
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}
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23
include/configs/bmips_common.h
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23
include/configs/bmips_common.h
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@ -0,0 +1,23 @@
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_BMIPS_COMMON_H
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#define __CONFIG_BMIPS_COMMON_H
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/* RAM */
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#define CONFIG_SYS_MEMTEST_START 0xa0000000
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#define CONFIG_SYS_MEMTEST_END 0xa2000000
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/* Memory usage */
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#define CONFIG_SYS_MAXARGS 24
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
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#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
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#define CONFIG_SYS_CBSIZE 512
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/* U-Boot */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#endif /* __CONFIG_BMIPS_COMMON_H */
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