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Merge branch 'master' of git://git.denx.de/u-boot-arm

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This commit is contained in:
Tom Rini 2013-06-05 12:45:34 -04:00
commit eecf9e2e78
13 changed files with 105 additions and 45 deletions
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39
arch/arm/cpu/armv7/omap-common/boot-common.c
View file

@ -25,6 +25,45 @@
DECLARE_GLOBAL_DATA_PTR;
void save_omap_boot_params(void)
{
u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
u8 boot_device;
u32 dev_desc, dev_data;
if ((rom_params < NON_SECURE_SRAM_START) ||
(rom_params > NON_SECURE_SRAM_END))
return;
/*
* rom_params can be type casted to omap_boot_parameters and
* used. But it not correct to assume that romcode structure
* encoding would be same as u-boot. So use the defined offsets.
*/
gd->arch.omap_boot_params.omap_bootdevice = boot_device =
*((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
gd->arch.omap_boot_params.ch_flags =
*((u8 *)(rom_params + CH_FLAGS_OFFSET));
if ((boot_device >= MMC_BOOT_DEVICES_START) &&
(boot_device <= MMC_BOOT_DEVICES_END)) {
#if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX)
if ((omap_hw_init_context() ==
OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
gd->arch.omap_boot_params.omap_bootmode =
*((u8 *)(rom_params + BOOT_MODE_OFFSET));
} else
#endif
{
dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
gd->arch.omap_boot_params.omap_bootmode =
*((u32 *)(dev_data + BOOT_MODE_OFFSET));
}
}
}
#ifdef CONFIG_SPL_BUILD
u32 spl_boot_device(void)
{

38
arch/arm/cpu/armv7/omap-common/hwinit-common.c
View file

@ -84,7 +84,7 @@ u32 cortex_rev(void)
return rev;
}
void omap_rev_string(void)
static void omap_rev_string(void)
{
u32 omap_rev = omap_revision();
u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
@ -111,42 +111,6 @@ void __weak srcomp_enable(void)
{
}
static void save_omap_boot_params(void)
{
u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
u8 boot_device;
u32 dev_desc, dev_data;
if ((rom_params < NON_SECURE_SRAM_START) ||
(rom_params > NON_SECURE_SRAM_END))
return;
/*
* rom_params can be type casted to omap_boot_parameters and
* used. But it not correct to assume that romcode structure
* encoding would be same as u-boot. So use the defined offsets.
*/
gd->arch.omap_boot_params.omap_bootdevice = boot_device =
*((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
gd->arch.omap_boot_params.ch_flags =
*((u8 *)(rom_params + CH_FLAGS_OFFSET));
if ((boot_device >= MMC_BOOT_DEVICES_START) &&
(boot_device <= MMC_BOOT_DEVICES_END)) {
if ((omap_hw_init_context() ==
OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
gd->arch.omap_boot_params.omap_bootmode =
*((u8 *)(rom_params + BOOT_MODE_OFFSET));
} else {
dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
gd->arch.omap_boot_params.omap_bootmode =
*((u32 *)(dev_data + BOOT_MODE_OFFSET));
}
}
}
#ifdef CONFIG_ARCH_CPU_INIT
/*
* SOC specific cpu init

4
arch/arm/include/asm/arch-am33xx/omap.h
View file

@ -29,8 +29,8 @@
* at 0x40304000(EMU base) so that our code works for both EMU and GP
*/
#ifdef CONFIG_AM33XX
#define NON_SECURE_SRAM_START 0x40304000
#define NON_SECURE_SRAM_END 0x4030E000
#define NON_SECURE_SRAM_START 0x402F0400
#define NON_SECURE_SRAM_END 0x40310000
#elif defined(CONFIG_TI814X)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40320000

1
arch/arm/include/asm/arch-am33xx/sys_proto.h
View file

@ -30,6 +30,7 @@ int print_cpuinfo(void);
extern struct ctrl_stat *cstat;
u32 get_device_type(void);
void save_omap_boot_params(void);
void setup_clocks_for_console(void);
void ddr_pll_config(unsigned int ddrpll_M);

1
arch/arm/include/asm/arch-omap4/sys_proto.h
View file

@ -54,6 +54,7 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit);
void sdram_init(void);
u32 omap_sdram_size(void);
u32 cortex_rev(void);
void save_omap_boot_params(void);
void init_omap_revision(void);
void do_io_settings(void);
void omap_vc_init(u16 speed_khz);

1
arch/arm/include/asm/arch-omap5/sys_proto.h
View file

@ -58,6 +58,7 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit);
void sdram_init(void);
u32 omap_sdram_size(void);
u32 cortex_rev(void);
void save_omap_boot_params(void);
void init_omap_revision(void);
void do_io_settings(void);
void omap_vc_init(u16 speed_khz);

9
board/isee/igep0033/board.c
View file

@ -105,6 +105,15 @@ static struct emif_regs ddr3_emif_reg_data = {
*/
void s_init(void)
{
/*
* Save the boot parameters passed from romcode.
* We cannot delay the saving further than this,
* to prevent overwrites.
*/
#ifdef CONFIG_SPL_BUILD
save_omap_boot_params();
#endif
/* WDT1 is already running when the bootloader gets control
* Disable it to avoid "random" resets
*/

9
board/phytec/pcm051/board.c
View file

@ -114,6 +114,15 @@ static struct emif_regs ddr3_emif_reg_data = {
*/
void s_init(void)
{
/*
* Save the boot parameters passed from romcode.
* We cannot delay the saving further than this,
* to prevent overwrites.
*/
#ifdef CONFIG_SPL_BUILD
save_omap_boot_params();
#endif
/*
* WDT1 is already running when the bootloader gets control
* Disable it to avoid "random" resets

9
board/ti/am335x/board.c
View file

@ -304,6 +304,15 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
*/
void s_init(void)
{
/*
* Save the boot parameters passed from romcode.
* We cannot delay the saving further than this,
* to prevent overwrites.
*/
#ifdef CONFIG_SPL_BUILD
save_omap_boot_params();
#endif
/* WDT1 is already running when the bootloader gets control
* Disable it to avoid "random" resets
*/

9
board/ti/ti814x/evm.c
View file

@ -149,6 +149,15 @@ static const struct ddr_data evm_ddr2_data = {
void s_init(void)
{
#ifdef CONFIG_SPL_BUILD
/*
* Save the boot parameters passed from romcode.
* We cannot delay the saving further than this,
* to prevent overwrites.
*/
#ifdef CONFIG_SPL_BUILD
save_omap_boot_params();
#endif
/* WDT1 is already running when the bootloader gets control
* Disable it to avoid "random" resets
*/

10
include/configs/am335x_evm.h
View file

@ -305,8 +305,14 @@
/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x402F0400
#define CONFIG_SPL_MAX_SIZE (101 * 1024)
/*
* Place the image at the start of the ROM defined image space and leave
* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
* We limit our size to the ROM-defined downloaded image area, and use the
* rest of the space for stack.
*/
#define CONFIG_SPL_TEXT_BASE 0x402F0500
#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_BSS_START_ADDR 0x80000000

10
include/configs/igep0033.h
View file

@ -214,8 +214,14 @@
/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x402F0400
#define CONFIG_SPL_MAX_SIZE (101 * 1024)
/*
* Place the image at the start of the ROM defined image space and leave
* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
* We limit our size to the ROM-defined downloaded image area, and use the
* rest of the space for stack.
*/
#define CONFIG_SPL_TEXT_BASE 0x402F0500
#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_BSS_START_ADDR 0x80000000

10
include/configs/pcm051.h
View file

@ -204,8 +204,14 @@
/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x402F0400
#define CONFIG_SPL_MAX_SIZE (101 * 1024)
/*
* Place the image at the start of the ROM defined image space and leave
* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
* We limit our size to the ROM-defined downloaded image area, and use the
* rest of the space for stack.
*/
#define CONFIG_SPL_TEXT_BASE 0x402F0500
#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_BSS_START_ADDR 0x80000000