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net: ravb: Avoid unsupported internal delay mode for R-Car E3/D3
According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3 (r8a77995). Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM when the DT explicitly specifies RGMII ID or TXID mode instead of setting it unconditionally when the PHY link speed is 1000 Mbit/s. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
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1 changed files with 10 additions and 3 deletions
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@ -46,6 +46,8 @@
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#define CSR_OPS 0x0000000F
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#define CSR_OPS_CONFIG BIT(1)
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#define APSR_TDM BIT(14)
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#define TCCR_TSRQ0 BIT(0)
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#define RFLR_RFL_MIN 0x05EE
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@ -389,9 +391,14 @@ static int ravb_dmac_init(struct udevice *dev)
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/* FIFO size set */
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writel(0x00222210, eth->iobase + RAVB_REG_TGC);
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/* Delay CLK: 2ns */
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if (pdata->max_speed == 1000)
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writel(BIT(14), eth->iobase + RAVB_REG_APSR);
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/* Delay CLK: 2ns (not applicable on R-Car E3/D3) */
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if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) ||
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(rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
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return 0;
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if ((pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
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(pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID))
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writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);
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return 0;
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}
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