net: ravb: Avoid unsupported internal delay mode for R-Car E3/D3

According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3
(r8a77995).

Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM
when the DT explicitly specifies RGMII ID or TXID mode instead of setting
it unconditionally when the PHY link speed is 1000 Mbit/s.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Marek Vasut 2019-04-13 11:42:34 +02:00 committed by Marek Vasut
parent 6b955cbaea
commit ef8c87812c

View file

@ -46,6 +46,8 @@
#define CSR_OPS 0x0000000F
#define CSR_OPS_CONFIG BIT(1)
#define APSR_TDM BIT(14)
#define TCCR_TSRQ0 BIT(0)
#define RFLR_RFL_MIN 0x05EE
@ -389,9 +391,14 @@ static int ravb_dmac_init(struct udevice *dev)
/* FIFO size set */
writel(0x00222210, eth->iobase + RAVB_REG_TGC);
/* Delay CLK: 2ns */
if (pdata->max_speed == 1000)
writel(BIT(14), eth->iobase + RAVB_REG_APSR);
/* Delay CLK: 2ns (not applicable on R-Car E3/D3) */
if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) ||
(rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
return 0;
if ((pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
(pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID))
writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);
return 0;
}