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imx: mx6sabresd: Use the pfuze common init function
Modify the pfuze init for mx6sabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
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commit
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1 changed files with 9 additions and 43 deletions
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@ -27,6 +27,7 @@
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#include <i2c.h>
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#include <i2c.h>
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#include <power/pmic.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#include <power/pfuze100_pmic.h>
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#include "../common/pfuze.h"
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#include <asm/arch/mx6-ddr.h>
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#include <asm/arch/mx6-ddr.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -559,60 +560,27 @@ int board_init(void)
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return 0;
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return 0;
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}
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}
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static int pfuze_init(void)
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int power_init_board(void)
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{
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{
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struct pmic *p;
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struct pmic *p;
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int ret;
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unsigned int reg;
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unsigned int reg;
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ret = power_pfuze100_init(I2C_PMIC);
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p = pfuze_common_init(I2C_PMIC);
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if (ret)
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if (!p)
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return ret;
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return -ENODEV;
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p = pmic_get("PFUZE100");
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ret = pmic_probe(p);
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if (ret)
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return ret;
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pmic_reg_read(p, PFUZE100_DEVICEID, ®);
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printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
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/* Increase VGEN3 from 2.5 to 2.8V */
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/* Increase VGEN3 from 2.5 to 2.8V */
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pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
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pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
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reg &= ~0xf;
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reg &= ~LDO_VOL_MASK;
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reg |= 0xa;
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reg |= LDOB_2_80V;
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pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
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pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
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/* Increase VGEN5 from 2.8 to 3V */
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/* Increase VGEN5 from 2.8 to 3V */
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pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
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pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
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reg &= ~0xf;
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reg &= ~LDO_VOL_MASK;
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reg |= 0xc;
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reg |= LDOB_3_00V;
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pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
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pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
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/* Set SW1AB stanby volage to 0.975V */
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pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
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reg &= ~0x3f;
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reg |= 0x1b;
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pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
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/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
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reg &= ~0xc0;
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reg |= 0x40;
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pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
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/* Set SW1C standby voltage to 0.975V */
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pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
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reg &= ~0x3f;
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reg |= 0x1b;
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pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
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/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
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reg &= ~0xc0;
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reg |= 0x40;
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pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
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return 0;
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return 0;
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}
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}
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@ -639,8 +607,6 @@ int board_late_init(void)
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#ifdef CONFIG_CMD_BMODE
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#ifdef CONFIG_CMD_BMODE
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add_board_boot_modes(board_boot_modes);
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add_board_boot_modes(board_boot_modes);
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#endif
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#endif
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pfuze_init();
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return 0;
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return 0;
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}
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}
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