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Code cleanup and default config update for STC GP3 SSA board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
parent
98c440bee6
commit
f1152f8c28
2 changed files with 200 additions and 200 deletions
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@ -255,7 +255,7 @@ board_early_init_f(void)
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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volatile ccsr_pcix_t *pci = &immr->im_pcix;
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pci->peer &= 0xfffffffdf; /* disable master abort */
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pci->peer &= 0xffffffdf; /* disable master abort */
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#endif
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/* Why is the phy reset done _after_ the ethernet
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@ -42,7 +42,7 @@
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#define CONFIG_CPM2 1 /* has CPM2 */
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#define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/
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#undef CONFIG_PCI /* pci ethernet support */
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#define CONFIG_PCI /* PCI ethernet support */
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#define CONFIG_TSEC_ENET /* tsec ethernet support*/
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#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
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#define CONFIG_ENV_OVERWRITE
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@ -234,8 +234,8 @@
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#define CONFIG_NET_MULTI
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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#undef CONFIG_EEPRO100
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#undef CONFIG_TULIP
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#define CONFIG_EEPRO100
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#define CONFIG_TULIP
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#if !defined(CONFIG_PCI_PNP)
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#define PCI_ENET0_IOADDR 0xe0000000
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@ -243,7 +243,7 @@
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#define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
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#endif
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#undef CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCI_SCAN_SHOW
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#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
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#endif /* CONFIG_PCI */
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@ -260,7 +260,7 @@
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#undef CONFIG_MPS85XX_FEC
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#define CONFIG_MPS85XX_FEC
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#define TSEC1_PHY_ADDR 2
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#define TSEC2_PHY_ADDR 4
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