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spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header
move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h and define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value). Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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c001486d99
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14 changed files with 4 additions and 13 deletions
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@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
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readl(as->regs + ATMEL_SPI_##reg)
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#define spi_writel(as, reg, value) \
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writel(value, as->regs + ATMEL_SPI_##reg)
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#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#endif
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@ -77,7 +77,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
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@ -137,7 +137,6 @@
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#ifndef CONFIG_AT91SAM9G20EK_2MMC
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH 1
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
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@ -109,7 +109,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
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@ -119,7 +119,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH 1
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define AT91_SPI_CLK 15000000
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@ -100,7 +100,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH 1
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define AT91_SPI_CLK 15000000
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@ -78,7 +78,6 @@
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/* SPI */
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#define CONFIG_ATMEL_SPI
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define AT91_SPI_CLK 15000000
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/* Serial port */
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@ -124,7 +124,6 @@
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#ifdef CONFIG_SYS_USE_DATAFLASH
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# define CONFIG_ATMEL_DATAFLASH_SPI
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# define CONFIG_HAS_DATAFLASH
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# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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# define AT91_SPI_CLK 15000000
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@ -174,7 +174,6 @@
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#ifdef CONFIG_SYS_USE_DATAFLASH
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# define CONFIG_ATMEL_DATAFLASH_SPI
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# define CONFIG_HAS_DATAFLASH
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# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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# define AT91_SPI_CLK 15000000
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@ -202,7 +202,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
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@ -216,7 +216,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH 1
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define AT91_SPI_CLK 15000000
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@ -80,7 +80,6 @@
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#define CONFIG_SPI
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#define CONFIG_CMD_SPI
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#define CONFIG_ATMEL_SPI
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_CMD_EEPROM
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#define CONFIG_SPI_M95XXX
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@ -85,7 +85,6 @@
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#define CONFIG_SPI
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#define CONFIG_CMD_SPI
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#define CONFIG_ATMEL_SPI
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_CMD_EEPROM
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#define CONFIG_SPI_M95XXX
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@ -85,7 +85,6 @@
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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#define CONFIG_HAS_DATAFLASH
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
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#define AT91_SPI_CLK 8000000
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