diff --git a/common/bloblist.c b/common/bloblist.c
index 784eff61de..baf1d371b7 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -29,24 +29,39 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static const char *const tag_name[] = {
-	[BLOBLISTT_NONE]		= "(none)",
-	[BLOBLISTT_U_BOOT_SPL_HANDOFF]	= "SPL hand-off",
-	[BLOBLISTT_VBOOT_CTX]		= "Chrome OS vboot context",
-	[BLOBLISTT_ACPI_GNVS]		= "ACPI GNVS",
-	[BLOBLISTT_INTEL_VBT]		= "Intel Video-BIOS table",
-	[BLOBLISTT_TPM2_TCG_LOG]	= "TPM v2 log space",
-	[BLOBLISTT_TCPA_LOG]		= "TPM log space",
-	[BLOBLISTT_ACPI_TABLES]		= "ACPI tables for x86",
-	[BLOBLISTT_SMBIOS_TABLES]	= "SMBIOS tables for x86",
+static struct tag_name {
+	enum bloblist_tag_t tag;
+	const char *name;
+} tag_name[] = {
+	{ BLOBLISTT_NONE, "(none)" },
+
+	/* BLOBLISTT_AREA_FIRMWARE_TOP */
+
+	/* BLOBLISTT_AREA_FIRMWARE */
+	{ BLOBLISTT_ACPI_GNVS, "ACPI GNVS" },
+	{ BLOBLISTT_INTEL_VBT, "Intel Video-BIOS table" },
+	{ BLOBLISTT_TPM2_TCG_LOG, "TPM v2 log space" },
+	{ BLOBLISTT_TCPA_LOG, "TPM log space" },
+	{ BLOBLISTT_ACPI_TABLES, "ACPI tables for x86" },
+	{ BLOBLISTT_SMBIOS_TABLES, "SMBIOS tables for x86" },
+	{ BLOBLISTT_VBOOT_CTX, "Chrome OS vboot context" },
+
+	/* BLOBLISTT_PROJECT_AREA */
+	{ BLOBLISTT_U_BOOT_SPL_HANDOFF, "SPL hand-off" },
+
+	/* BLOBLISTT_VENDOR_AREA */
 };
 
 const char *bloblist_tag_name(enum bloblist_tag_t tag)
 {
-	if (tag < 0 || tag >= BLOBLISTT_COUNT)
-		return "invalid";
+	int i;
 
-	return tag_name[tag];
+	for (i = 0; i < ARRAY_SIZE(tag_name); i++) {
+		if (tag_name[i].tag == tag)
+			return tag_name[i].name;
+	}
+
+	return "invalid";
 }
 
 static struct bloblist_rec *bloblist_first_blob(struct bloblist_hdr *hdr)
@@ -381,10 +396,10 @@ void bloblist_show_list(void)
 	struct bloblist_hdr *hdr = gd->bloblist;
 	struct bloblist_rec *rec;
 
-	printf("%-8s  %8s  Tag Name\n", "Address", "Size");
+	printf("%-8s  %8s   Tag Name\n", "Address", "Size");
 	for (rec = bloblist_first_blob(hdr); rec;
 	     rec = bloblist_next_blob(hdr, rec)) {
-		printf("%08lx  %8x  %3d %s\n",
+		printf("%08lx  %8x  %4x %s\n",
 		       (ulong)map_to_sysmem((void *)rec + rec->hdr_size),
 		       rec->size, rec->tag, bloblist_tag_name(rec->tag));
 	}
diff --git a/include/bloblist.h b/include/bloblist.h
index fac25907c0..5de4545160 100644
--- a/include/bloblist.h
+++ b/include/bloblist.h
@@ -25,21 +25,57 @@ enum {
 enum bloblist_tag_t {
 	BLOBLISTT_NONE = 0,
 
-	/* Vendor-specific tags are permitted here */
-	BLOBLISTT_U_BOOT_SPL_HANDOFF,		/* Hand-off info from SPL */
-	BLOBLISTT_VBOOT_CTX,		/* Chromium OS verified boot context */
+	/*
+	 * Standard area to allocate blobs used across firmware components, for
+	 * things that are very commonly used, particularly in multiple
+	 * projects.
+	 */
+	BLOBLISTT_AREA_FIRMWARE_TOP = 0x1,
+
+	/* Standard area to allocate blobs used across firmware components */
+	BLOBLISTT_AREA_FIRMWARE = 0x100,
 	/*
 	 * Advanced Configuration and Power Interface Global Non-Volatile
 	 * Sleeping table. This forms part of the ACPI tables passed to Linux.
 	 */
-	BLOBLISTT_ACPI_GNVS,
-	BLOBLISTT_INTEL_VBT,		/* Intel Video-BIOS table */
-	BLOBLISTT_TPM2_TCG_LOG,		/* TPM v2 log space */
-	BLOBLISTT_TCPA_LOG,		/* TPM log space */
-	BLOBLISTT_ACPI_TABLES,		/* ACPI tables for x86 */
-	BLOBLISTT_SMBIOS_TABLES,	/* SMBIOS tables for x86 */
+	BLOBLISTT_ACPI_GNVS = 0x100,
+	BLOBLISTT_INTEL_VBT = 0x101,	/* Intel Video-BIOS table */
+	BLOBLISTT_TPM2_TCG_LOG = 0x102,	/* TPM v2 log space */
+	BLOBLISTT_TCPA_LOG = 0x103,	/* TPM log space */
+	BLOBLISTT_ACPI_TABLES = 0x104,	/* ACPI tables for x86 */
+	BLOBLISTT_SMBIOS_TABLES = 0x105, /* SMBIOS tables for x86 */
+	BLOBLISTT_VBOOT_CTX = 0x106,	/* Chromium OS verified boot context */
 
-	BLOBLISTT_COUNT
+	/*
+	 * Project-specific tags are permitted here. Projects can be open source
+	 * or not, but the format of the data must be fuily documented in an
+	 * open source project, including all fields, bits, etc. Naming should
+	 * be: BLOBLISTT_<project>_<purpose_here>
+	 */
+	BLOBLISTT_PROJECT_AREA = 0x8000,
+	BLOBLISTT_U_BOOT_SPL_HANDOFF = 0x8000, /* Hand-off info from SPL */
+
+	/*
+	 * Vendor-specific tags are permitted here. Projects can be open source
+	 * or not, but the format of the data must be fuily documented in an
+	 * open source project, including all fields, bits, etc. Naming should
+	 * be BLOBLISTT_<vendor>_<purpose_here>
+	 */
+	BLOBLISTT_VENDOR_AREA = 0xc000,
+
+	/* Tags after this are not allocated for now */
+	BLOBLISTT_EXPANSION = 0x10000,
+
+	/*
+	 * Tags from here are on reserved for private use within a single
+	 * firmware binary (i.e. a single executable or phase of a project).
+	 * These tags can be passed between binaries within a local
+	 * implementation, but cannot be used in upstream code. Allocate a
+	 * tag in one of the areas above if you want that.
+	 *
+	 * This area may move in future.
+	 */
+	BLOBLISTT_PRIVATE_AREA = 0xffff0000,
 };
 
 /**
diff --git a/test/bloblist.c b/test/bloblist.c
index 2e8e23d77d..c5788d5cd8 100644
--- a/test/bloblist.c
+++ b/test/bloblist.c
@@ -19,9 +19,9 @@ DECLARE_GLOBAL_DATA_PTR;
 		UNIT_TEST(_name, _flags, bloblist_test)
 
 enum {
-	TEST_TAG		= 1,
-	TEST_TAG2		= 2,
-	TEST_TAG_MISSING	= 3,
+	TEST_TAG		= BLOBLISTT_U_BOOT_SPL_HANDOFF,
+	TEST_TAG2		= BLOBLISTT_VBOOT_CTX,
+	TEST_TAG_MISSING	= 0x10000,
 
 	TEST_SIZE		= 10,
 	TEST_SIZE2		= 20,
@@ -288,10 +288,10 @@ static int bloblist_test_cmd_list(struct unit_test_state *uts)
 	ut_silence_console(uts);
 	console_record_reset();
 	run_command("bloblist list", 0);
-	ut_assert_nextline("Address       Size  Tag Name");
-	ut_assert_nextline("%08lx  %8x    1 SPL hand-off",
+	ut_assert_nextline("Address       Size   Tag Name");
+	ut_assert_nextline("%08lx  %8x  8000 SPL hand-off",
 			   (ulong)map_to_sysmem(data), TEST_SIZE);
-	ut_assert_nextline("%08lx  %8x    2 Chrome OS vboot context",
+	ut_assert_nextline("%08lx  %8x   106 Chrome OS vboot context",
 			   (ulong)map_to_sysmem(data2), TEST_SIZE2);
 	ut_assert_console_end();
 	ut_unsilence_console(uts);