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gpio: stm32: support gpio ops in SPL

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The GPIO support is needed in SPL to managed the SD cart detect
used on stm32mp157c-ev1 and dk2 board.
So this patch activates the associated code in stm32_gpio.c.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrick Delaunay 2020-04-22 14:29:17 +02:00
parent 5ef642c173
commit f17412ed38
1 changed files with 1 additions and 6 deletions
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7
drivers/gpio/stm32_gpio.c
View file

@ -20,7 +20,6 @@
#define MODE_BITS_MASK 3
#define BSRR_BIT(gpio_pin, value) BIT(gpio_pin + (value ? 0 : 16))
#ifndef CONFIG_SPL_BUILD
/*
* convert gpio offset to gpio index taking into account gpio holes
* into gpio bank
@ -147,7 +146,6 @@ static const struct dm_gpio_ops gpio_stm32_ops = {
.set_value = stm32_gpio_set_value,
.get_function = stm32_gpio_get_function,
};
#endif
static int gpio_stm32_probe(struct udevice *dev)
{
@ -162,7 +160,6 @@ static int gpio_stm32_probe(struct udevice *dev)
priv->regs = (struct stm32_gpio_regs *)addr;
#ifndef CONFIG_SPL_BUILD
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct ofnode_phandle_args args;
const char *name;
@ -195,7 +192,7 @@ static int gpio_stm32_probe(struct udevice *dev)
dev_dbg(dev, "addr = 0x%p bank_name = %s gpio_count = %d gpio_range = 0x%x\n",
(u32 *)priv->regs, uc_priv->bank_name, uc_priv->gpio_count,
priv->gpio_range);
#endif
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
return ret;
@ -215,9 +212,7 @@ U_BOOT_DRIVER(gpio_stm32) = {
.name = "gpio_stm32",
.id = UCLASS_GPIO,
.probe = gpio_stm32_probe,
#ifndef CONFIG_SPL_BUILD
.ops = &gpio_stm32_ops,
#endif
.flags = DM_UC_FLAG_SEQ_ALIAS,
.priv_auto_alloc_size = sizeof(struct stm32_gpio_priv),
};