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PPC: 85xx: Generalize DDR TLB mapping function
The DDR mapping function really is just a generic virtual -> physical mapping function. Generalize it so it can support any virtual starting offset and IO maps just the same. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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46a346834b
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f29f804a93
2 changed files with 40 additions and 15 deletions
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@ -236,20 +236,26 @@ void init_addr_map(void)
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}
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}
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#endif
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#endif
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unsigned int
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uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,
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setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
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enum tlb_map_type map_type)
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{
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{
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int i;
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int i;
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unsigned int tlb_size;
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unsigned int tlb_size;
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unsigned int wimge = MAS2_M;
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unsigned int wimge;
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unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
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unsigned int perm;
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unsigned int max_cam, tsize_mask;
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unsigned int max_cam, tsize_mask;
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u64 size, memsize = (u64)memsize_in_meg << 20;
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if (map_type == TLB_MAP_RAM) {
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perm = MAS3_SX|MAS3_SW|MAS3_SR;
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wimge = MAS2_M;
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#ifdef CONFIG_SYS_PPC_DDR_WIMGE
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#ifdef CONFIG_SYS_PPC_DDR_WIMGE
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wimge = CONFIG_SYS_PPC_DDR_WIMGE;
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wimge = CONFIG_SYS_PPC_DDR_WIMGE;
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#endif
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#endif
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size = min(memsize, CONFIG_MAX_MEM_MAPPED);
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} else {
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perm = MAS3_SW|MAS3_SR;
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wimge = MAS2_I|MAS2_G;
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}
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if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
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if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
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/* Convert (4^max) kB to (2^max) bytes */
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/* Convert (4^max) kB to (2^max) bytes */
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max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
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max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
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@ -261,11 +267,11 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
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}
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}
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for (i = 0; size && i < 8; i++) {
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for (i = 0; size && i < 8; i++) {
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int ram_tlb_index = find_free_tlbcam();
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int tlb_index = find_free_tlbcam();
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u32 camsize = __ilog2_u64(size) & tsize_mask;
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u32 camsize = __ilog2_u64(size) & tsize_mask;
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u32 align = __ilog2(ram_tlb_address) & tsize_mask;
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u32 align = __ilog2(v_addr) & tsize_mask;
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if (ram_tlb_index == -1)
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if (tlb_index == -1)
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break;
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break;
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if (align == -2) align = max_cam;
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if (align == -2) align = max_cam;
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@ -277,18 +283,29 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
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tlb_size = camsize - 10;
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tlb_size = camsize - 10;
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set_tlb(1, ram_tlb_address, p_addr,
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set_tlb(1, v_addr, p_addr, perm, wimge,
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MAS3_SX|MAS3_SW|MAS3_SR, wimge,
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0, tlb_index, tlb_size, 1);
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0, ram_tlb_index, tlb_size, 1);
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size -= 1ULL << camsize;
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size -= 1ULL << camsize;
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memsize -= 1ULL << camsize;
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v_addr += 1UL << camsize;
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ram_tlb_address += 1UL << camsize;
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p_addr += 1UL << camsize;
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p_addr += 1UL << camsize;
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}
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}
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return size;
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}
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unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr,
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unsigned int memsize_in_meg)
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{
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unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
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u64 memsize = (u64)memsize_in_meg << 20;
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memsize = min(memsize, CONFIG_MAX_MEM_MAPPED);
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memsize = tlb_map_range(ram_tlb_address, p_addr, memsize, TLB_MAP_RAM);
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if (memsize)
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if (memsize)
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print_size(memsize, " left unmapped\n");
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print_size(memsize, " left unmapped\n");
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return memsize_in_meg;
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return memsize_in_meg;
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}
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}
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@ -509,6 +509,14 @@ extern void print_tlbcam(void);
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extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
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extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg);
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extern void clear_ddr_tlbs(unsigned int memsize_in_meg);
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extern void clear_ddr_tlbs(unsigned int memsize_in_meg);
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enum tlb_map_type {
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TLB_MAP_RAM,
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TLB_MAP_IO,
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};
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extern uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,
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enum tlb_map_type map_type);
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extern void write_tlb(u32 _mas0, u32 _mas1, u32 _mas2, u32 _mas3, u32 _mas7);
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extern void write_tlb(u32 _mas0, u32 _mas1, u32 _mas2, u32 _mas3, u32 _mas7);
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#define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \
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#define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \
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