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arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15

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Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla 2018-04-26 18:21:28 +05:30 • committed by Tom Rini
parent 7240b80ee0
commit f4bcd767bd
2 changed files with 8 additions and 5 deletions
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7
arch/arm/Kconfig
View file

@ -74,8 +74,15 @@ config ARM_ASM_UNIFIED
config THUMB2_KERNEL config THUMB2_KERNEL
bool bool
config SYS_ARM_CACHE_CP15
bool "CP15 based cache enabling support"
help
Select this if your processor suports enabling caches by using
CP15 registers.
config SYS_ARM_MMU config SYS_ARM_MMU
bool "MMU-based Paged Memory Management Support" bool "MMU-based Paged Memory Management Support"
select SYS_ARM_CACHE_CP15
help help
Select if you want MMU-based virtualised addressing space Select if you want MMU-based virtualised addressing space
support by paged memory management. support by paged memory management.

6
arch/arm/lib/Makefile
View file

@ -61,11 +61,7 @@ obj-y += reset.o
endif endif
obj-y += cache.o obj-y += cache.o
ifndef CONFIG_ARM64 obj-$(CONFIG_SYS_ARM_CACHE_CP15) += cache-cp15.o
ifndef CONFIG_CPU_V7M
obj-y += cache-cp15.o
endif
endif
obj-y += psci-dt.o obj-y += psci-dt.o