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powerpc/83xx/km: add support for 8321 based tuge1 board
This board is similar to our tuxx1 target. But on this board there is only one application specific chip select configured. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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3 changed files with 21 additions and 5 deletions
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@ -440,6 +440,7 @@ Heiko Schocher <hs@denx.de>
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ve8313 MPC8313
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Holger Brunck <holger.brunck@keymile.com>
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tuge1 MPC8321
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tuxx1 MPC8321
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Peter De Schrijver <p2@mind.be>
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@ -593,6 +593,7 @@ MPC837XERDB powerpc mpc83xx mpc837xerdb freesca
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kmeter1 powerpc mpc83xx km83xx keymile
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kmsupx5 powerpc mpc83xx km83xx keymile
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suvd3 powerpc mpc83xx km83xx keymile
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tuge1 powerpc mpc83xx km83xx keymile - tuxx1:KM_DISABLE_APP2
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tuxx1 powerpc mpc83xx km83xx keymile
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MERGERBOX powerpc mpc83xx mergerbox matrix_vision
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MVBLM7 powerpc mpc83xx mvblm7 matrix_vision
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@ -27,9 +27,13 @@
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_TUXXX /* TUXX1 board specific */
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#define CONFIG_TUXXX /* TUXX1 board (tuxa1/tuda1) specific */
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#define CONFIG_HOSTNAME tuxx1
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#ifdef CONFIG_KM_DISABLE_APP2
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#define CONFIG_KM_BOARD_NAME "tuge1"
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#else
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#define CONFIG_KM_BOARD_NAME "tuxx1"
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#endif
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#define CONFIG_SYS_TEXT_BASE 0xF0000000
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@ -38,16 +42,18 @@
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#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
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#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
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#ifndef CONFIG_KM_DISABLE_APP2
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#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
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#define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
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#endif
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/*
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* Init Local Bus Memory Controller:
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*
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* Bank Bus Machine PortSz Size Device on TUDA1 TUXA1
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* ---- --- ------- ------ ----- ---------------------
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* 2 Local GPCM 8 bit 256MB PAXG LPXF
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* 3 Local GPCM 8 bit 256MB PINC3 PINC2
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* Bank Bus Machine PortSz Size Device on TUDA1 TUXA1 TUGE1
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* ---- --- ------- ------ ----- ----------------------------
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* 2 Local GPCM 8 bit 256MB PAXG LPXF PAXI
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* 3 Local GPCM 8 bit 256MB PINC3 PINC2 unused
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*
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*/
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@ -71,6 +77,7 @@
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OR_GPCM_TRLX_SET | \
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OR_GPCM_EHTR_CLEAR | \
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OR_GPCM_EAD)
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#ifndef CONFIG_KM_DISABLE_APP2
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/*
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* Configuration for C3 on the local bus
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*/
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@ -94,6 +101,7 @@
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#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
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0x0000c000 | \
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MxMR_WLFx_2X)
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#endif
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/*
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* MMU Setup
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@ -113,6 +121,11 @@
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BATL_GUARDEDSTORAGE)
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#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
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#ifdef CONFIG_KM_DISABLE_APP2
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#define CONFIG_SYS_IBAT6L (0)
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#define CONFIG_SYS_IBAT6U (0)
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#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
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#else
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/* APP2: icache cacheable, but dcache-inhibit and guarded */
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#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
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BATL_PP_RW | \
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@ -125,6 +138,7 @@
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BATL_PP_RW | \
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BATL_CACHEINHIBIT | \
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BATL_GUARDEDSTORAGE)
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#endif
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#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
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#define CONFIG_SYS_IBAT7L (0)
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