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https://github.com/Fishwaldo/u-boot.git
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
This commit is contained in:
commit
f6808c48a5
4 changed files with 14 additions and 9 deletions
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@ -1563,7 +1563,7 @@ int boot_get_fdt (int flag, int argc, char *argv[], bootm_headers_t *images,
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*of_flat_tree = fdt_blob;
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*of_flat_tree = fdt_blob;
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*of_size = be32_to_cpu (fdt_totalsize (fdt_blob));
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*of_size = be32_to_cpu (fdt_totalsize (fdt_blob));
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debug (" of_flat_tree at 0x%08lx size 0x%08lx\n",
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debug (" of_flat_tree at 0x%08lx size 0x%08lx\n",
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*of_flat_tree, *of_size);
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(ulong)*of_flat_tree, *of_size);
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return 0;
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return 0;
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@ -48,29 +48,29 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
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#ifdef CONFIG_INTERRUPTS
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#ifdef CONFIG_INTERRUPTS
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pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */
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pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */
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debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
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debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1);
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pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
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pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
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debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2);
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debug("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2);
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pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
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pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
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debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3);
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debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3);
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#ifdef CONFIG_PCI1
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#ifdef CONFIG_PCI1
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pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
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pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
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debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8);
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debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8);
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#endif
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#endif
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#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
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#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
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pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
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pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
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debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9);
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debug("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9);
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#endif
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#endif
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#ifdef CONFIG_PCIE1
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#ifdef CONFIG_PCIE1
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pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
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pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
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debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10);
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debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10);
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#endif
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#endif
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#ifdef CONFIG_PCIE3
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#ifdef CONFIG_PCIE3
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pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
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pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
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debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11);
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debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11);
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#endif
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#endif
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pic->ctpr=0; /* 40080 clear current task priority register */
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pic->ctpr=0; /* 40080 clear current task priority register */
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@ -37,6 +37,11 @@ __secondary_start_page:
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li r3,0x201
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li r3,0x201
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mtspr SPRN_BUCSR,r3
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mtspr SPRN_BUCSR,r3
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/* Ensure TB is 0 */
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li r3,0
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mttbl r3
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mttbu r3
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/* Enable/invalidate the I-Cache */
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/* Enable/invalidate the I-Cache */
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mfspr r0,SPRN_L1CSR1
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mfspr r0,SPRN_L1CSR1
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ori r0,r0,(L1CSR1_ICFI|L1CSR1_ICE)
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ori r0,r0,(L1CSR1_ICFI|L1CSR1_ICE)
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@ -516,7 +516,7 @@ static int flash_isequal (flash_info_t * info, flash_sect_t sect,
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retval = (flash_read16(addr) == cword.w);
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retval = (flash_read16(addr) == cword.w);
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break;
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break;
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case FLASH_CFI_32BIT:
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case FLASH_CFI_32BIT:
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debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
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debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
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retval = (flash_read32(addr) == cword.l);
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retval = (flash_read32(addr) == cword.l);
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break;
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break;
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case FLASH_CFI_64BIT:
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case FLASH_CFI_64BIT:
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