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Merge branch 'master' of git://git.denx.de/u-boot-mmc
This commit is contained in:
commit
f78cb2ab1e
2 changed files with 4 additions and 5 deletions
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@ -23,7 +23,6 @@
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#include <malloc.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <mmc.h>
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#include <dwmmc.h>
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#include <dwmmc.h>
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#include <asm/arch/clk.h>
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#include <asm-generic/errno.h>
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#include <asm-generic/errno.h>
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#define PAGE_SIZE 4096
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#define PAGE_SIZE 4096
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@ -100,7 +100,7 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
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else if (cmd->resp_type & MMC_RSP_PRESENT)
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else if (cmd->resp_type & MMC_RSP_PRESENT)
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xfertyp |= XFERTYP_RSPTYP_48;
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xfertyp |= XFERTYP_RSPTYP_48;
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#ifdef CONFIG_MX53
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#if defined(CONFIG_MX53) || defined(CONFIG_T4240QDS)
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
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xfertyp |= XFERTYP_CMDTYP_ABORT;
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xfertyp |= XFERTYP_CMDTYP_ABORT;
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#endif
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#endif
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@ -470,7 +470,7 @@ static int esdhc_init(struct mmc *mmc)
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int timeout = 1000;
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int timeout = 1000;
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/* Reset the entire host controller */
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/* Reset the entire host controller */
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esdhc_write32(®s->sysctl, SYSCTL_RSTA);
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esdhc_setbits32(®s->sysctl, SYSCTL_RSTA);
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/* Wait until the controller is available */
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/* Wait until the controller is available */
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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@ -481,7 +481,7 @@ static int esdhc_init(struct mmc *mmc)
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esdhc_write32(®s->scr, 0x00000040);
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esdhc_write32(®s->scr, 0x00000040);
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#endif
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#endif
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esdhc_write32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
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esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
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/* Set the initial clock speed */
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/* Set the initial clock speed */
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mmc_set_clock(mmc, 400000);
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mmc_set_clock(mmc, 400000);
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@ -515,7 +515,7 @@ static void esdhc_reset(struct fsl_esdhc *regs)
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unsigned long timeout = 100; /* wait max 100 ms */
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unsigned long timeout = 100; /* wait max 100 ms */
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/* reset the controller */
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/* reset the controller */
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esdhc_write32(®s->sysctl, SYSCTL_RSTA);
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esdhc_setbits32(®s->sysctl, SYSCTL_RSTA);
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/* hardware clears the bit when it is done */
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/* hardware clears the bit when it is done */
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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