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https://github.com/Fishwaldo/u-boot.git
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IDE: - make ide_inb () and ide_outb () "weak", so boards can
define there own I/O functions. (Needed for the pcs440ep board). - The default I/O Functions are again 8 Bit accesses. - Added CONFIG_CMD_IDE for the pcs440ep Board. Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
parent
3e66c07800
commit
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5 changed files with 49 additions and 44 deletions
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@ -30,6 +30,7 @@
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#include <spd_sdram.h>
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#include <spd_sdram.h>
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#include <status_led.h>
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#include <status_led.h>
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#include <sha1.h>
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#include <sha1.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -867,6 +868,29 @@ U_BOOT_CMD(
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);
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);
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#endif
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#endif
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#if defined (CONFIG_CMD_IDE)
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/* These addresses need to be shifted one place to the left
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* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
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* These values are shifted
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*/
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extern ulong *ide_bus_offset;
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void inline ide_outb(int dev, int port, unsigned char val)
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{
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debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
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dev, port, val, (ATA_CURR_BASE(dev)+port));
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out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
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}
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unsigned char inline ide_inb(int dev, int port)
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{
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uchar val;
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val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
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debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
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dev, port, (ATA_CURR_BASE(dev)+port), val);
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return (val);
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}
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#endif
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#ifdef CONFIG_IDE_PREINIT
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#ifdef CONFIG_IDE_PREINIT
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int ide_preinit (void)
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int ide_preinit (void)
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{
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{
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@ -31,6 +31,7 @@
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#include <command.h>
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#include <command.h>
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#include <image.h>
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#include <image.h>
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#include <asm/byteorder.h>
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#include <asm/byteorder.h>
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#include <asm/io.h>
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#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
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#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
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# include <pcmcia.h>
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# include <pcmcia.h>
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@ -128,8 +129,6 @@ ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
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};
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};
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#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
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#ifndef CONFIG_AMIGAONEG3SE
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#ifndef CONFIG_AMIGAONEG3SE
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static int ide_bus_ok[CFG_IDE_MAXBUS];
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static int ide_bus_ok[CFG_IDE_MAXBUS];
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#else
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#else
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@ -172,8 +171,8 @@ static uchar ide_wait (int dev, ulong t);
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#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
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#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
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static void __inline__ ide_outb(int dev, int port, unsigned char val);
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void inline ide_outb(int dev, int port, unsigned char val);
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static unsigned char __inline__ ide_inb(int dev, int port);
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unsigned char inline ide_inb(int dev, int port);
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static void input_data(int dev, ulong *sect_buf, int words);
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static void input_data(int dev, ulong *sect_buf, int words);
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static void output_data(int dev, ulong *sect_buf, int words);
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static void output_data(int dev, ulong *sect_buf, int words);
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static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
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static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
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@ -805,45 +804,27 @@ set_pcmcia_timing (int pmode)
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/* ------------------------------------------------------------------------- */
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/* ------------------------------------------------------------------------- */
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#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
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void inline
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static void __inline__
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__ide_outb(int dev, int port, unsigned char val)
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ide_outb(int dev, int port, unsigned char val)
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{
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{
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debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
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debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
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dev, port, val, (ATA_CURR_BASE(dev)+port));
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dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
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outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
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/* Ensure I/O operations complete */
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EIEIO;
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*((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
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}
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}
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#else /* ! __PPC__ */
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void inline ide_outb (int dev, int port, unsigned char val)
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static void __inline__
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__attribute__((weak, alias("__ide_outb")));
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ide_outb(int dev, int port, unsigned char val)
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{
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outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
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}
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#endif /* __PPC__ */
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unsigned char inline
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#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
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__ide_inb(int dev, int port)
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static unsigned char __inline__
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ide_inb(int dev, int port)
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{
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{
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uchar val;
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uchar val;
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/* Ensure I/O operations complete */
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val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
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EIEIO;
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val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
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debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
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debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
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dev, port, (ATA_CURR_BASE(dev)+port), val);
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dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
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return (val);
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return val;
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}
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}
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#else /* ! __PPC__ */
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unsigned char inline ide_inb(int dev, int port)
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static unsigned char __inline__
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__attribute__((weak, alias("__ide_inb")));
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ide_inb(int dev, int port)
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{
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return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
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}
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#endif /* __PPC__ */
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#ifdef __PPC__
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#ifdef __PPC__
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# ifdef CONFIG_AMIGAONEG3SE
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# ifdef CONFIG_AMIGAONEG3SE
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#define SIO_CONFIG_RA 0x398
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#define SIO_CONFIG_RA 0x398
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#define SIO_CONFIG_RD 0x399
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#define SIO_CONFIG_RD 0x399
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#ifndef _IO_BASE
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#define _IO_BASE 0
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#endif
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#define readb(addr) in_8((volatile u8 *)(addr))
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#define readb(addr) in_8((volatile u8 *)(addr))
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#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
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#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_REISER
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_USB
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#define CONFIG_SUPPORT_VFAT
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#define CONFIG_SUPPORT_VFAT
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/*
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/*
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/* Offset for alternate registers */
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/* Offset for alternate registers */
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#define CFG_ATA_ALT_OFFSET (0x0000)
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#define CFG_ATA_ALT_OFFSET (0x0000)
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/* These addresses need to be shifted one place to the left
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* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
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* These values are shifted
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*/
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#define CFG_ATA_PORT_ADDR(port) ((port) << 1)
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#endif /* __CONFIG_H */
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#endif /* __CONFIG_H */
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#define IDE_BUS(dev) (dev >> 1)
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#define IDE_BUS(dev) (dev >> 1)
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#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
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#ifdef CONFIG_IDE_LED
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#ifdef CONFIG_IDE_LED
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/*
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/*
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