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mips: octeon: mrvl,cn73xx.dtsi: Add GPIO DT nodes
Add the Octeon GPIO DT node to the dtsi file. Signed-off-by: Stefan Roese <sr@denx.de>
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@ -38,6 +38,32 @@
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#size-cells = <1>;
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};
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gpio: gpio-controller@1070000000800 {
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#gpio-cells = <2>;
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compatible = "cavium,octeon-7890-gpio";
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reg = <0x10700 0x00000800 0x0 0x100>;
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gpio-controller;
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nr-gpios = <32>;
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/* Interrupts are specified by two parts:
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* 1) GPIO pin number (0..15)
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* 2) Triggering (1 - edge rising
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* 2 - edge falling
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* 4 - level active high
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* 8 - level active low)
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*/
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interrupt-controller;
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#interrupt-cells = <2>;
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/* The GPIO pins connect to 16 consecutive CUI bits */
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interrupts = <0x03000 4>, <0x03001 4>,
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<0x03002 4>, <0x03003 4>,
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<0x03004 4>, <0x03005 4>,
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<0x03006 4>, <0x03007 4>,
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<0x03008 4>, <0x03009 4>,
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<0x0300a 4>, <0x0300b 4>,
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<0x0300c 4>, <0x0300d 4>,
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<0x0300e 4>, <0x0300f 4>;
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};
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reset: reset@1180006001600 {
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compatible = "mrvl,cn7xxx-rst";
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reg = <0x11800 0x06001600 0x0 0x200>;
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