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mtd: nand: omap_gpmc: Always use ready/busy pin
The functions to detect the state of the ready / busy signal is already available but only used in the SPL case. Lets use it always, also for the main U-Boot. As all boards should have this HW connection. Testing on Siemens Draco (am335x) showed a small perfomance gain by using this ready pin to detect the NAND chip state. Here the values tested on Draco with Hynix 4GBit NAND: Without NAND ready pin: U-Boot# time nand read 80400000 0 400000 NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK time: 2.947 seconds, 2947 ticks With NAND ready pin: U-Boot# time nand read 80400000 0 400000 NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK time: 2.795 seconds, 2795 ticks So an increase of approx. 5%. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
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1 changed files with 4 additions and 5 deletions
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@ -73,14 +73,11 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
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writeb(cmd, this->IO_ADDR_W);
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writeb(cmd, this->IO_ADDR_W);
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}
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}
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#ifdef CONFIG_SPL_BUILD
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/* Check wait pin as dev ready indicator */
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/* Check wait pin as dev ready indicator */
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static int omap_spl_dev_ready(struct mtd_info *mtd)
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static int omap_dev_ready(struct mtd_info *mtd)
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{
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{
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return gpmc_cfg->status & (1 << 8);
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return gpmc_cfg->status & (1 << 8);
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}
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}
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#endif
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/*
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/*
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* gen_true_ecc - This function will generate true ECC value, which
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* gen_true_ecc - This function will generate true ECC value, which
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@ -887,7 +884,9 @@ int board_nand_init(struct nand_chip *nand)
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nand->read_buf = nand_read_buf16;
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nand->read_buf = nand_read_buf16;
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else
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else
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nand->read_buf = nand_read_buf;
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nand->read_buf = nand_read_buf;
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nand->dev_ready = omap_spl_dev_ready;
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#endif
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#endif
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nand->dev_ready = omap_dev_ready;
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return 0;
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return 0;
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}
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}
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