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net: eepro100: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data, so move them into the private data. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This commit is contained in:
parent
39daab2376
commit
fb8307e52a
1 changed files with 35 additions and 24 deletions
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@ -183,12 +183,6 @@ struct descriptor { /* A generic descriptor. */
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#define TOUT_LOOP 1000000
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static struct eepro100_rxfd rx_ring[NUM_RX_DESC]; /* RX descriptor ring */
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static struct eepro100_txfd tx_ring[NUM_TX_DESC]; /* TX descriptor ring */
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static int rx_next; /* RX descriptor ring pointer */
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static int tx_next; /* TX descriptor ring pointer */
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static int tx_threshold;
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/*
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* The parameters for a CmdConfigure operation.
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* There are so many options that it would be difficult to document
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@ -202,6 +196,15 @@ static const char i82558_config_cmd[] = {
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};
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struct eepro100_priv {
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/* RX descriptor ring */
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struct eepro100_rxfd rx_ring[NUM_RX_DESC];
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/* TX descriptor ring */
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struct eepro100_txfd tx_ring[NUM_TX_DESC];
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/* RX descriptor ring pointer */
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int rx_next;
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/* TX descriptor ring pointer */
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int tx_next;
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int tx_threshold;
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struct eth_device dev;
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pci_dev_t devno;
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char *name;
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@ -348,6 +351,7 @@ static int eepro100_miiphy_write(struct mii_dev *bus, int addr, int devad,
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static void init_rx_ring(struct eepro100_priv *priv)
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{
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struct eepro100_rxfd *rx_ring = priv->rx_ring;
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int i;
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for (i = 0; i < NUM_RX_DESC; i++) {
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@ -366,13 +370,15 @@ static void init_rx_ring(struct eepro100_priv *priv)
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(unsigned long)rx_ring +
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(sizeof(*rx_ring) * NUM_RX_DESC));
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rx_next = 0;
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priv->rx_next = 0;
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}
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static void purge_tx_ring(struct eepro100_priv *priv)
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{
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tx_next = 0;
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tx_threshold = 0x01208000;
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struct eepro100_txfd *tx_ring = priv->tx_ring;
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priv->tx_next = 0;
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priv->tx_threshold = 0x01208000;
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memset(tx_ring, 0, sizeof(*tx_ring) * NUM_TX_DESC);
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flush_dcache_range((unsigned long)tx_ring,
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@ -533,6 +539,8 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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{
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struct eepro100_priv *priv =
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container_of(dev, struct eepro100_priv, dev);
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struct eepro100_rxfd *rx_ring = priv->rx_ring;
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struct eepro100_txfd *tx_ring = priv->tx_ring;
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struct eepro100_txfd *ias_cmd, *cfg_cmd;
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int ret, status = -1;
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int tx_cur;
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@ -569,20 +577,20 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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}
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/* RX ring cache was already flushed in init_rx_ring() */
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OUTL(priv, phys_to_bus(priv->devno, (u32)&rx_ring[rx_next]),
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OUTL(priv, phys_to_bus(priv->devno, (u32)&rx_ring[priv->rx_next]),
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SCB_POINTER);
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OUTW(priv, SCB_M | RUC_START, SCB_CMD);
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/* Send the Configure frame */
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tx_cur = tx_next;
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tx_next = ((tx_next + 1) % NUM_TX_DESC);
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tx_cur = priv->tx_next;
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priv->tx_next = ((priv->tx_next + 1) % NUM_TX_DESC);
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cfg_cmd = &tx_ring[tx_cur];
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cfg_cmd->command = cpu_to_le16(CONFIG_SYS_CMD_SUSPEND |
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CONFIG_SYS_CMD_CONFIGURE);
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cfg_cmd->status = 0;
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cfg_cmd->link = cpu_to_le32(phys_to_bus(priv->devno,
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(u32)&tx_ring[tx_next]));
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(u32)&tx_ring[priv->tx_next]));
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memcpy(((struct descriptor *)cfg_cmd)->params, i82558_config_cmd,
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sizeof(i82558_config_cmd));
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@ -595,15 +603,15 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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}
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/* Send the Individual Address Setup frame */
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tx_cur = tx_next;
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tx_next = ((tx_next + 1) % NUM_TX_DESC);
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tx_cur = priv->tx_next;
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priv->tx_next = ((priv->tx_next + 1) % NUM_TX_DESC);
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ias_cmd = &tx_ring[tx_cur];
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ias_cmd->command = cpu_to_le16(CONFIG_SYS_CMD_SUSPEND |
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CONFIG_SYS_CMD_IAS);
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ias_cmd->status = 0;
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ias_cmd->link = cpu_to_le32(phys_to_bus(priv->devno,
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(u32)&tx_ring[tx_next]));
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(u32)&tx_ring[priv->tx_next]));
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memcpy(((struct descriptor *)ias_cmd)->params, priv->enetaddr, 6);
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@ -624,6 +632,7 @@ static int eepro100_send(struct eth_device *dev, void *packet, int length)
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{
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struct eepro100_priv *priv =
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container_of(dev, struct eepro100_priv, dev);
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struct eepro100_txfd *tx_ring = priv->tx_ring;
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struct eepro100_txfd *desc;
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int ret, status = -1;
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int tx_cur;
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@ -633,16 +642,16 @@ static int eepro100_send(struct eth_device *dev, void *packet, int length)
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goto done;
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}
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tx_cur = tx_next;
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tx_next = (tx_next + 1) % NUM_TX_DESC;
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tx_cur = priv->tx_next;
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priv->tx_next = (priv->tx_next + 1) % NUM_TX_DESC;
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desc = &tx_ring[tx_cur];
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desc->command = cpu_to_le16(TXCB_CMD_TRANSMIT | TXCB_CMD_SF |
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TXCB_CMD_S | TXCB_CMD_EL);
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desc->status = 0;
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desc->count = cpu_to_le32(tx_threshold);
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desc->count = cpu_to_le32(priv->tx_threshold);
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desc->link = cpu_to_le32(phys_to_bus(priv->devno,
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(u32)&tx_ring[tx_next]));
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(u32)&tx_ring[priv->tx_next]));
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desc->tx_desc_addr = cpu_to_le32(phys_to_bus(priv->devno,
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(u32)&desc->tx_buf_addr0));
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desc->tx_buf_addr0 = cpu_to_le32(phys_to_bus(priv->devno,
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@ -667,6 +676,7 @@ static int eepro100_recv(struct eth_device *dev)
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{
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struct eepro100_priv *priv =
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container_of(dev, struct eepro100_priv, dev);
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struct eepro100_rxfd *rx_ring = priv->rx_ring;
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struct eepro100_rxfd *desc;
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int rx_prev, length = 0;
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u16 status, stat;
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@ -675,7 +685,7 @@ static int eepro100_recv(struct eth_device *dev)
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OUTW(priv, stat & SCB_STATUS_RNR, SCB_STATUS);
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for (;;) {
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desc = &rx_ring[rx_next];
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desc = &rx_ring[priv->rx_next];
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invalidate_dcache_range((unsigned long)desc,
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(unsigned long)desc + sizeof(*desc));
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status = le16_to_cpu(desc->status);
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@ -701,14 +711,14 @@ static int eepro100_recv(struct eth_device *dev)
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flush_dcache_range((unsigned long)desc,
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(unsigned long)desc + sizeof(*desc));
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rx_prev = (rx_next + NUM_RX_DESC - 1) % NUM_RX_DESC;
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rx_prev = (priv->rx_next + NUM_RX_DESC - 1) % NUM_RX_DESC;
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desc = &rx_ring[rx_prev];
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desc->control = 0;
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flush_dcache_range((unsigned long)desc,
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(unsigned long)desc + sizeof(*desc));
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/* Update entry information. */
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rx_next = (rx_next + 1) % NUM_RX_DESC;
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priv->rx_next = (priv->rx_next + 1) % NUM_RX_DESC;
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}
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if (stat & SCB_STATUS_RNR) {
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@ -724,7 +734,8 @@ static int eepro100_recv(struct eth_device *dev)
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/* RX ring cache was already flushed in init_rx_ring() */
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OUTL(priv, phys_to_bus(priv->devno,
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(u32)&rx_ring[rx_next]), SCB_POINTER);
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(u32)&rx_ring[priv->rx_next]),
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SCB_POINTER);
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OUTW(priv, SCB_M | RUC_START, SCB_CMD);
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}
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