cmd: fpga: Clean coding style

No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
This commit is contained in:
Michal Simek 2013-04-26 13:10:07 +02:00
parent ee976c1b03
commit fc598412ce

View file

@ -34,7 +34,7 @@
#include <malloc.h> #include <malloc.h>
/* Local functions */ /* Local functions */
static int fpga_get_op (char *opstr); static int fpga_get_op(char *opstr);
/* Local defines */ /* Local defines */
#define FPGA_NONE -1 #define FPGA_NONE -1
@ -45,7 +45,7 @@ static int fpga_get_op (char *opstr);
#define FPGA_LOADMK 4 #define FPGA_LOADMK 4
/* Convert bitstream data and load into the fpga */ /* Convert bitstream data and load into the fpga */
int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) int fpga_loadbitstream(unsigned long dev, char *fpgadata, size_t size)
{ {
#if defined(CONFIG_FPGA_XILINX) #if defined(CONFIG_FPGA_XILINX)
unsigned int length; unsigned int length;
@ -58,38 +58,36 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
dataptr = (unsigned char *)fpgadata; dataptr = (unsigned char *)fpgadata;
/* skip the first bytes of the bitsteam, their meaning is unknown */ /* skip the first bytes of the bitsteam, their meaning is unknown */
length = (*dataptr << 8) + *(dataptr+1); length = (*dataptr << 8) + *(dataptr + 1);
dataptr+=2; dataptr += 2;
dataptr+=length; dataptr += length;
/* get design name (identifier, length, string) */ /* get design name (identifier, length, string) */
length = (*dataptr << 8) + *(dataptr+1); length = (*dataptr << 8) + *(dataptr + 1);
dataptr+=2; dataptr += 2;
if (*dataptr++ != 0x61) { if (*dataptr++ != 0x61) {
debug("%s: Design name identifier not recognized " debug("%s: Design name id not recognized in bitstream\n",
"in bitstream\n", __func__);
__func__);
return FPGA_FAIL; return FPGA_FAIL;
} }
length = (*dataptr << 8) + *(dataptr+1); length = (*dataptr << 8) + *(dataptr + 1);
dataptr+=2; dataptr += 2;
for(i=0;i<length;i++) for (i = 0; i < length; i++)
buffer[i] = *dataptr++; buffer[i] = *dataptr++;
printf(" design filename = \"%s\"\n", buffer); printf(" design filename = \"%s\"\n", buffer);
/* get part number (identifier, length, string) */ /* get part number (identifier, length, string) */
if (*dataptr++ != 0x62) { if (*dataptr++ != 0x62) {
printf("%s: Part number identifier not recognized " printf("%s: Part number id not recognized in bitstream\n",
"in bitstream\n", __func__);
__func__);
return FPGA_FAIL; return FPGA_FAIL;
} }
length = (*dataptr << 8) + *(dataptr+1); length = (*dataptr << 8) + *(dataptr + 1);
dataptr+=2; dataptr += 2;
for(i=0;i<length;i++) for (i = 0; i < length; i++)
buffer[i] = *dataptr++; buffer[i] = *dataptr++;
printf(" part number = \"%s\"\n", buffer); printf(" part number = \"%s\"\n", buffer);
@ -101,35 +99,35 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
} }
length = (*dataptr << 8) + *(dataptr+1); length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2; dataptr += 2;
for(i=0;i<length;i++) for (i = 0; i < length; i++)
buffer[i] = *dataptr++; buffer[i] = *dataptr++;
printf(" date = \"%s\"\n", buffer); printf(" date = \"%s\"\n", buffer);
/* get time (identifier, length, string) */ /* get time (identifier, length, string) */
if (*dataptr++ != 0x64) { if (*dataptr++ != 0x64) {
printf("%s: Time identifier not recognized in bitstream\n", printf("%s: Time identifier not recognized in bitstream\n",
__func__); __func__);
return FPGA_FAIL; return FPGA_FAIL;
} }
length = (*dataptr << 8) + *(dataptr+1); length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2; dataptr += 2;
for(i=0;i<length;i++) for (i = 0; i < length; i++)
buffer[i] = *dataptr++; buffer[i] = *dataptr++;
printf(" time = \"%s\"\n", buffer); printf(" time = \"%s\"\n", buffer);
/* get fpga data length (identifier, length) */ /* get fpga data length (identifier, length) */
if (*dataptr++ != 0x65) { if (*dataptr++ != 0x65) {
printf("%s: Data length identifier not recognized in bitstream\n", printf("%s: Data length id not recognized in bitstream\n",
__func__); __func__);
return FPGA_FAIL; return FPGA_FAIL;
} }
swapsize = ((unsigned int) *dataptr <<24) + swapsize = ((unsigned int) *dataptr << 24) +
((unsigned int) *(dataptr+1) <<16) + ((unsigned int) *(dataptr + 1) << 16) +
((unsigned int) *(dataptr+2) <<8 ) + ((unsigned int) *(dataptr + 2) << 8) +
((unsigned int) *(dataptr+3) ) ; ((unsigned int) *(dataptr + 3));
dataptr+=4; dataptr += 4;
printf(" bytes in bitstream = %d\n", swapsize); printf(" bytes in bitstream = %d\n", swapsize);
rc = fpga_load(dev, dataptr, swapsize); rc = fpga_load(dev, dataptr, swapsize);
@ -148,81 +146,81 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
* If there is no data addr field, the fpgadata environment variable is used. * If there is no data addr field, the fpgadata environment variable is used.
* The info command requires no data address field. * The info command requires no data address field.
*/ */
int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{ {
int op, dev = FPGA_INVALID_DEVICE; int op, dev = FPGA_INVALID_DEVICE;
size_t data_size = 0; size_t data_size = 0;
void *fpga_data = NULL; void *fpga_data = NULL;
char *devstr = getenv ("fpga"); char *devstr = getenv("fpga");
char *datastr = getenv ("fpgadata"); char *datastr = getenv("fpgadata");
int rc = FPGA_FAIL; int rc = FPGA_FAIL;
int wrong_parms = 0; int wrong_parms = 0;
#if defined (CONFIG_FIT) #if defined(CONFIG_FIT)
const char *fit_uname = NULL; const char *fit_uname = NULL;
ulong fit_addr; ulong fit_addr;
#endif #endif
if (devstr) if (devstr)
dev = (int) simple_strtoul (devstr, NULL, 16); dev = (int) simple_strtoul(devstr, NULL, 16);
if (datastr) if (datastr)
fpga_data = (void *) simple_strtoul (datastr, NULL, 16); fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
switch (argc) { switch (argc) {
case 5: /* fpga <op> <dev> <data> <datasize> */ case 5: /* fpga <op> <dev> <data> <datasize> */
data_size = simple_strtoul (argv[4], NULL, 16); data_size = simple_strtoul(argv[4], NULL, 16);
case 4: /* fpga <op> <dev> <data> */ case 4: /* fpga <op> <dev> <data> */
#if defined(CONFIG_FIT) #if defined(CONFIG_FIT)
if (fit_parse_subimage (argv[3], (ulong)fpga_data, if (fit_parse_subimage(argv[3], (ulong)fpga_data,
&fit_addr, &fit_uname)) { &fit_addr, &fit_uname)) {
fpga_data = (void *)fit_addr; fpga_data = (void *)fit_addr;
debug("* fpga: subimage '%s' from FIT image " debug("* fpga: subimage '%s' from FIT image ",
"at 0x%08lx\n", fit_uname);
fit_uname, fit_addr); debug("at 0x%08lx\n", fit_addr);
} else } else
#endif #endif
{ {
fpga_data = (void *) simple_strtoul (argv[3], NULL, 16); fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
debug("* fpga: cmdline image address = 0x%08lx\n", debug("* fpga: cmdline image address = 0x%08lx\n",
(ulong)fpga_data); (ulong)fpga_data);
} }
debug("%s: fpga_data = 0x%x\n", __func__, (uint) fpga_data); debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data);
case 3: /* fpga <op> <dev | data addr> */ case 3: /* fpga <op> <dev | data addr> */
dev = (int) simple_strtoul (argv[2], NULL, 16); dev = (int)simple_strtoul(argv[2], NULL, 16);
debug("%s: device = %d\n", __func__, dev); debug("%s: device = %d\n", __func__, dev);
/* FIXME - this is a really weak test */ /* FIXME - this is a really weak test */
if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */ if ((argc == 3) && (dev > fpga_count())) {
/* must be buffer ptr */
debug("%s: Assuming buffer pointer in arg 3\n", debug("%s: Assuming buffer pointer in arg 3\n",
__func__); __func__);
#if defined(CONFIG_FIT) #if defined(CONFIG_FIT)
if (fit_parse_subimage (argv[2], (ulong)fpga_data, if (fit_parse_subimage(argv[2], (ulong)fpga_data,
&fit_addr, &fit_uname)) { &fit_addr, &fit_uname)) {
fpga_data = (void *)fit_addr; fpga_data = (void *)fit_addr;
debug("* fpga: subimage '%s' from FIT image " debug("* fpga: subimage '%s' from FIT image ",
"at 0x%08lx\n", fit_uname);
fit_uname, fit_addr); debug("at 0x%08lx\n", fit_addr);
} else } else
#endif #endif
{ {
fpga_data = (void *) dev; fpga_data = (void *)dev;
debug("* fpga: cmdline image address = " debug("* fpga: cmdline image addr = 0x%08lx\n",
"0x%08lx\n", (ulong)fpga_data); (ulong)fpga_data);
} }
debug("%s: fpga_data = 0x%x\n", debug("%s: fpga_data = 0x%x\n",
__func__, (uint) fpga_data); __func__, (uint)fpga_data);
dev = FPGA_INVALID_DEVICE; /* reset device num */ dev = FPGA_INVALID_DEVICE; /* reset device num */
} }
case 2: /* fpga <op> */ case 2: /* fpga <op> */
op = (int) fpga_get_op (argv[1]); op = (int)fpga_get_op(argv[1]);
break; break;
default: default:
debug("%s: Too many or too few args (%d)\n", debug("%s: Too many or too few args (%d)\n", __func__, argc);
__func__, argc);
op = FPGA_NONE; /* force usage display */ op = FPGA_NONE; /* force usage display */
break; break;
} }
@ -258,11 +256,11 @@ int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
return CMD_RET_USAGE; return CMD_RET_USAGE;
case FPGA_INFO: case FPGA_INFO:
rc = fpga_info (dev); rc = fpga_info(dev);
break; break;
case FPGA_LOAD: case FPGA_LOAD:
rc = fpga_load (dev, fpga_data, data_size); rc = fpga_load(dev, fpga_data, data_size);
break; break;
case FPGA_LOADB: case FPGA_LOADB:
@ -270,15 +268,16 @@ int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
break; break;
case FPGA_LOADMK: case FPGA_LOADMK:
switch (genimg_get_format (fpga_data)) { switch (genimg_get_format(fpga_data)) {
case IMAGE_FORMAT_LEGACY: case IMAGE_FORMAT_LEGACY:
{ {
image_header_t *hdr = (image_header_t *)fpga_data; image_header_t *hdr =
ulong data; (image_header_t *)fpga_data;
ulong data;
data = (ulong)image_get_data (hdr); data = (ulong)image_get_data(hdr);
data_size = image_get_data_size (hdr); data_size = image_get_data_size(hdr);
rc = fpga_load (dev, (void *)data, data_size); rc = fpga_load(dev, (void *)data, data_size);
} }
break; break;
#if defined(CONFIG_FIT) #if defined(CONFIG_FIT)
@ -289,95 +288,97 @@ int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
const void *fit_data; const void *fit_data;
if (fit_uname == NULL) { if (fit_uname == NULL) {
puts ("No FIT subimage unit name\n"); puts("No FIT subimage unit name\n");
return 1; return 1;
} }
if (!fit_check_format (fit_hdr)) { if (!fit_check_format(fit_hdr)) {
puts ("Bad FIT image format\n"); puts("Bad FIT image format\n");
return 1; return 1;
} }
/* get fpga component image node offset */ /* get fpga component image node offset */
noffset = fit_image_get_node (fit_hdr, fit_uname); noffset = fit_image_get_node(fit_hdr,
fit_uname);
if (noffset < 0) { if (noffset < 0) {
printf ("Can't find '%s' FIT subimage\n", fit_uname); printf("Can't find '%s' FIT subimage\n",
fit_uname);
return 1; return 1;
} }
/* verify integrity */ /* verify integrity */
if (!fit_image_check_hashes (fit_hdr, noffset)) { if (!fit_image_check_hashes(fit_hdr, noffset)) {
puts ("Bad Data Hash\n"); puts("Bad Data Hash\n");
return 1; return 1;
} }
/* get fpga subimage data address and length */ /* get fpga subimage data address and length */
if (fit_image_get_data (fit_hdr, noffset, &fit_data, &data_size)) { if (fit_image_get_data(fit_hdr, noffset,
puts ("Could not find fpga subimage data\n"); &fit_data, &data_size)) {
puts("Fpga subimage data not found\n");
return 1; return 1;
} }
rc = fpga_load (dev, fit_data, data_size); rc = fpga_load(dev, fit_data, data_size);
} }
break; break;
#endif #endif
default: default:
puts ("** Unknown image type\n"); puts("** Unknown image type\n");
rc = FPGA_FAIL; rc = FPGA_FAIL;
break; break;
} }
break; break;
case FPGA_DUMP: case FPGA_DUMP:
rc = fpga_dump (dev, fpga_data, data_size); rc = fpga_dump(dev, fpga_data, data_size);
break; break;
default: default:
printf ("Unknown operation\n"); printf("Unknown operation\n");
return CMD_RET_USAGE; return CMD_RET_USAGE;
} }
return (rc); return rc;
} }
/* /*
* Map op to supported operations. We don't use a table since we * Map op to supported operations. We don't use a table since we
* would just have to relocate it from flash anyway. * would just have to relocate it from flash anyway.
*/ */
static int fpga_get_op (char *opstr) static int fpga_get_op(char *opstr)
{ {
int op = FPGA_NONE; int op = FPGA_NONE;
if (!strcmp ("info", opstr)) { if (!strcmp("info", opstr))
op = FPGA_INFO; op = FPGA_INFO;
} else if (!strcmp ("loadb", opstr)) { else if (!strcmp("loadb", opstr))
op = FPGA_LOADB; op = FPGA_LOADB;
} else if (!strcmp ("load", opstr)) { else if (!strcmp("load", opstr))
op = FPGA_LOAD; op = FPGA_LOAD;
} else if (!strcmp ("loadmk", opstr)) { else if (!strcmp("loadmk", opstr))
op = FPGA_LOADMK; op = FPGA_LOADMK;
} else if (!strcmp ("dump", opstr)) { else if (!strcmp("dump", opstr))
op = FPGA_DUMP; op = FPGA_DUMP;
}
if (op == FPGA_NONE) { if (op == FPGA_NONE)
printf ("Unknown fpga operation \"%s\"\n", opstr); printf("Unknown fpga operation \"%s\"\n", opstr);
}
return op; return op;
} }
U_BOOT_CMD (fpga, 6, 1, do_fpga, U_BOOT_CMD(fpga, 6, 1, do_fpga,
"loadable FPGA image support", "loadable FPGA image support",
"[operation type] [device number] [image address] [image size]\n" "[operation type] [device number] [image address] [image size]\n"
"fpga operations:\n" "fpga operations:\n"
" dump\t[dev]\t\t\tLoad device to memory buffer\n" " dump\t[dev]\t\t\tLoad device to memory buffer\n"
" info\t[dev]\t\t\tlist known device information\n" " info\t[dev]\t\t\tlist known device information\n"
" load\t[dev] [address] [size]\tLoad device from memory buffer\n" " load\t[dev] [address] [size]\tLoad device from memory buffer\n"
" loadb\t[dev] [address] [size]\t" " loadb\t[dev] [address] [size]\t"
"Load device from bitstream buffer (Xilinx only)\n" "Load device from bitstream buffer (Xilinx only)\n"
" loadmk [dev] [address]\tLoad device generated with mkimage" " loadmk [dev] [address]\tLoad device generated with mkimage"
#if defined(CONFIG_FIT) #if defined(CONFIG_FIT)
"\n" "\n"
"\tFor loadmk operating on FIT format uImage address must include\n" "\tFor loadmk operating on FIT format uImage address must include\n"
"\tsubimage unit name in the form of addr:<subimg_uname>" "\tsubimage unit name in the form of addr:<subimg_uname>"
#endif #endif
); );