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Fix errors that occur when accessing SystemACE CF

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Patch by Jeff Angielski, 09 Jan 2005
This commit is contained in:
Wolfgang Denk 2005-08-07 23:55:50 +02:00
parent 7ebdb19b39
commit fe599e17ed
2 changed files with 30 additions and 4 deletions
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3
CHANGELOG
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@ -2,6 +2,9 @@
Changes for U-Boot 1.1.3: Changes for U-Boot 1.1.3:
====================================================================== ======================================================================
* Fix errors that occur when accessing SystemACE CF
Patch by Jeff Angielski, 09 Jan 2005
* Document switching between U-Boot and PlanetCore on RPXlite * Document switching between U-Boot and PlanetCore on RPXlite
by Sam Song, 24 Dec 2004 by Sam Song, 24 Dec 2004

31
common/cmd_ace.c
View file

@ -31,6 +31,12 @@
* available to cmd_fat.c:get_dev and filling in a block device * available to cmd_fat.c:get_dev and filling in a block device
* description that has all the bits needed for FAT support to * description that has all the bits needed for FAT support to
* read sectors. * read sectors.
*
* According to Xilinx technical support, before accessing the
* SystemACE CF you need to set the following control bits:
* FORCECFGMODE : 1
* CFGMODE : 0
* CFGSTART : 0
*/ */
# include <common.h> # include <common.h>
@ -95,7 +101,9 @@ static int get_cf_lock(void)
int retry = 10; int retry = 10;
/* CONTROLREG = LOCKREG */ /* CONTROLREG = LOCKREG */
ace_writew(0x0002, 0x18); unsigned val=ace_readw(0x18);
val|=0x0002;
ace_writew((val&0xffff), 0x18);
/* Wait for MPULOCK in STATUSREG[15:0] */ /* Wait for MPULOCK in STATUSREG[15:0] */
while (! (ace_readw(0x04) & 0x0002)) { while (! (ace_readw(0x04) & 0x0002)) {
@ -112,8 +120,9 @@ static int get_cf_lock(void)
static void release_cf_lock(void) static void release_cf_lock(void)
{ {
/* CONTROLREG = none */ unsigned val=ace_readw(0x18);
ace_writew(0x0000, 0x18); val&=~(0x0002);
ace_writew((val&0xffff), 0x18);
} }
block_dev_desc_t * systemace_get_dev(int dev) block_dev_desc_t * systemace_get_dev(int dev)
@ -127,6 +136,9 @@ block_dev_desc_t * systemace_get_dev(int dev)
systemace_dev.blksz = 512; systemace_dev.blksz = 512;
systemace_dev.removable = 1; systemace_dev.removable = 1;
systemace_dev.block_read = systemace_read; systemace_dev.block_read = systemace_read;
init_part(&systemace_dev);
} }
return &systemace_dev; return &systemace_dev;
@ -145,6 +157,7 @@ static unsigned long systemace_read(int dev,
int retry; int retry;
unsigned blk_countdown; unsigned blk_countdown;
unsigned char*dp = (unsigned char*)buffer; unsigned char*dp = (unsigned char*)buffer;
unsigned val;
if (get_cf_lock() < 0) { if (get_cf_lock() < 0) {
unsigned status = ace_readw(0x04); unsigned status = ace_readw(0x04);
@ -165,7 +178,7 @@ static unsigned long systemace_read(int dev,
retry = 2000; retry = 2000;
for (;;) { for (;;) {
unsigned val = ace_readw(0x04); val = ace_readw(0x04);
/* If CFDETECT is false, card is missing. */ /* If CFDETECT is false, card is missing. */
if (! (val & 0x0010)) { if (! (val & 0x0010)) {
@ -212,6 +225,11 @@ static unsigned long systemace_read(int dev,
/* Write sector count | ReadMemCardData. */ /* Write sector count | ReadMemCardData. */
ace_writew((trans&0xff) | 0x0300, 0x14); ace_writew((trans&0xff) | 0x0300, 0x14);
/* Reset the configruation controller */
val = ace_readw(0x18);
val|=0x0080;
ace_writew(val, 0x18);
retry = trans * 16; retry = trans * 16;
while (retry > 0) { while (retry > 0) {
int idx; int idx;
@ -231,6 +249,11 @@ static unsigned long systemace_read(int dev,
retry -= 1; retry -= 1;
} }
/* Clear the configruation controller reset */
val = ace_readw(0x18);
val&=~0x0080;
ace_writew(val, 0x18);
/* Count the blocks we transfer this time. */ /* Count the blocks we transfer this time. */
start += trans; start += trans;
blk_countdown -= trans; blk_countdown -= trans;