mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-31 19:41:46 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-marvell
This commit is contained in:
Wolfgang Denk
commit
fe8d63c8c7
13 changed files with 247 additions and 13 deletions
|
|
@ -59,6 +59,11 @@
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|||
#define KW_USB20_BASE (KW_REGISTER(0x50000))
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||||
#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
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#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
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#define KW_SATA_BASE (KW_REGISTER(0x80000))
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/* Kirkwood Sata controller has two ports */
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#define KW_SATA_PORT0_OFFSET 0x2000
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#define KW_SATA_PORT1_OFFSET 0x4000
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/* Kirkwood GbE controller has two ports */
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#define MAX_MVGBE_DEVS 2
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|
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|||
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@ -55,6 +55,9 @@
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#define ORION5X_USB20_PORT0_BASE (ORION5X_REGISTER(0x50000))
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#define ORION5X_USB20_PORT1_BASE (ORION5X_REGISTER(0xA0000))
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#define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000))
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#define ORION5X_SATA_BASE (ORION5X_REGISTER(0x80000))
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#define ORION5X_SATA_PORT0_OFFSET 0x2000
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#define ORION5X_SATA_PORT1_OFFSET 0x4000
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/* Orion5x GbE controller has a single port */
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#define MAX_MVGBE_DEVS 1
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@ -95,4 +95,7 @@
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#define CONFIG_FSL_LBC
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#endif
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/* All PPC boards must swap IDE bytes */
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#define CONFIG_IDE_SWAP_IO
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#endif /* _ASM_CONFIG_H_ */
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@ -25,6 +25,7 @@
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/*
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* IDE support
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*/
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#include <common.h>
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#include <config.h>
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#include <watchdog.h>
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@ -45,6 +46,12 @@
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#include <mpc5xxx.h>
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#endif
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#ifdef CONFIG_ORION5X
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#include <asm/arch/orion5x.h>
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#elif defined CONFIG_KIRKWOOD
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#include <asm/arch/kirkwood.h>
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#endif
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#include <ide.h>
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#include <ata.h>
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@ -847,7 +854,7 @@ input_swap_data(int dev, ulong *sect_buf, int words)
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#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
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#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
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#if defined(CONFIG_IDE_SWAP_IO)
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static void
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output_data(int dev, ulong *sect_buf, int words)
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{
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|
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@ -891,15 +898,15 @@ output_data(int dev, ulong *sect_buf, int words)
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}
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#endif
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}
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#else /* ! __PPC__ */
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#else /* ! CONFIG_IDE_SWAP_IO */
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static void
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output_data(int dev, ulong *sect_buf, int words)
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{
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outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
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}
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#endif /* __PPC__ */
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#endif /* CONFIG_IDE_SWAP_IO */
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#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
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#if defined(CONFIG_IDE_SWAP_IO)
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static void
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input_data(int dev, ulong *sect_buf, int words)
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{
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|
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@ -949,14 +956,14 @@ input_data(int dev, ulong *sect_buf, int words)
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}
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#endif
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}
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#else /* ! __PPC__ */
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#else /* ! CONFIG_IDE_SWAP_IO */
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static void
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input_data(int dev, ulong *sect_buf, int words)
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{
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insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
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}
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|
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#endif /* __PPC__ */
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#endif /* CONFIG_IDE_SWAP_IO */
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||||
|
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/* -------------------------------------------------------------------------
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*/
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||||
|
|
@ -1573,7 +1580,7 @@ int ide_device_present(int dev)
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|||
* ATAPI Support
|
||||
*/
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||||
|
||||
#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
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#if defined(CONFIG_IDE_SWAP_IO)
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||||
/* since ATAPI may use commands with not 4 bytes alligned length
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||||
* we have our own transfer functions, 2 bytes alligned */
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static void
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|
|
@ -1640,7 +1647,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts)
|
|||
#endif
|
||||
}
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||||
|
||||
#else /* ! __PPC__ */
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#else /* ! CONFIG_IDE_SWAP_IO */
|
||||
static void
|
||||
output_data_shorts(int dev, ushort *sect_buf, int shorts)
|
||||
{
|
||||
|
|
@ -1653,7 +1660,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts)
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|||
insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
|
||||
}
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||||
|
||||
#endif /* __PPC__ */
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||||
#endif /* CONFIG_IDE_SWAP_IO */
|
||||
|
||||
/*
|
||||
* Wait until (Status & mask) == res, or timeout (in ms)
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|
|
|
|||
|
|
@ -6,6 +6,14 @@ follow the connections of the standard lubbock. Anyway just the block
|
|||
marked memory configuration should be touched since the other parameters
|
||||
are imposed by the PXA architecture.
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||||
|
||||
EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined
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||||
would cause looping on inw()/outw() rather than using insw()/outsw(),
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||||
thus making sure IDE / ATA bytes are properly swapped. This behaviour
|
||||
is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with
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PCMCIA should #define CONFIG_IDE_SWAP_IO.
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#define CONFIG_IDE_SWAP_IO
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#define CONFIG_PXA_PCMCIA 1
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#define CONFIG_PXA_IDE 1
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||||
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|
|
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@ -25,15 +25,16 @@ include $(TOPDIR)/config.mk
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|||
|
||||
LIB := $(obj)libblock.a
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|
||||
COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
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COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o
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COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o
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COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
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COBJS-$(CONFIG_IDE_SIL680) += sil680.o
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||||
COBJS-$(CONFIG_LIBATA) += libata.o
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COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o
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COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
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||||
COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o
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||||
COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o
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COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
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COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
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COBJS-$(CONFIG_IDE_SIL680) += sil680.o
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COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
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COBJS-$(CONFIG_SYSTEMACE) += systemace.o
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|
||||
|
|
|
|||
140
drivers/block/mvsata_ide.c
Normal file
140
drivers/block/mvsata_ide.c
Normal file
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@ -0,0 +1,140 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
|
||||
*
|
||||
* Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
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#include <asm/io.h>
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||||
|
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#if defined(CONFIG_ORION5X)
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#include <asm/arch/orion5x.h>
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#elif defined(CONFIG_KIRKWOOD)
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#include <asm/arch/kirkwood.h>
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#endif
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||||
/* SATA port registers */
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struct mvsata_port_registers {
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u32 reserved1[192];
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/* offset 0x300 : ATA Interface registers */
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u32 sstatus;
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u32 serror;
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u32 scontrol;
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u32 ltmode;
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u32 phymode3;
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u32 phymode4;
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u32 reserved2[5];
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||||
u32 phymode1;
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u32 phymode2;
|
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u32 bist_cr;
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u32 bist_dw1;
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u32 bist_dw2;
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u32 serrorintrmask;
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};
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||||
/*
|
||||
* Sanity checks:
|
||||
* - to compile at all, we need CONFIG_SYS_ATA_BASE_ADDR.
|
||||
* - for ide_preinit to make sense, we need at least one of
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* CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE0_OFFSET;
|
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* - for inde_preinit to be called, we need CONFIG_IDE_PREINIT.
|
||||
* Fail with an explanation message if these conditions are not met.
|
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* This is particularly important for CONFIG_IDE_PREINIT, because
|
||||
* its lack would not cause a build error.
|
||||
*/
|
||||
|
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#if !defined(CONFIG_SYS_ATA_BASE_ADDR)
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#error CONFIG_SYS_ATA_BASE_ADDR must be defined
|
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#elif !defined(CONFIG_SYS_ATA_IDE0_OFFSET) \
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&& !defined(CONFIG_SYS_ATA_IDE1_OFFSET)
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#error CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET \
|
||||
must be defined
|
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#elif !defined(CONFIG_IDE_PREINIT)
|
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#error CONFIG_IDE_PREINIT must be defined
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Masks and values for SControl DETection and Interface Power Management,
|
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* and for SStatus DETection.
|
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*/
|
||||
|
||||
#define MVSATA_SCONTROL_DET_MASK 0x0000000F
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#define MVSATA_SCONTROL_DET_NONE 0x00000000
|
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#define MVSATA_SCONTROL_DET_INIT 0x00000001
|
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#define MVSATA_SCONTROL_IPM_MASK 0x00000F00
|
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#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
|
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#define MVSATA_SCONTROL_MASK \
|
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(MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
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#define MVSATA_PORT_INIT \
|
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(MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
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#define MVSATA_PORT_USE \
|
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(MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
|
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#define MVSATA_SSTATUS_DET_MASK 0x0000000F
|
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#define MVSATA_SSTATUS_DET_DEVCOMM 0x00000003
|
||||
|
||||
/*
|
||||
* Initialize one MVSATAHC port: set SControl's IPM to "always active"
|
||||
* and DET to "reset", then wait for SStatus's DET to become "device and
|
||||
* comm ok" (or time out after 50 us if no device), then set SControl's
|
||||
* DET back to "no action".
|
||||
*/
|
||||
|
||||
static void mvsata_ide_initialize_port(struct mvsata_port_registers *port)
|
||||
{
|
||||
u32 control;
|
||||
u32 status;
|
||||
u32 tout = 50; /* wait at most 50 us for SATA reset to complete */
|
||||
|
||||
control = readl(&port->scontrol);
|
||||
control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
|
||||
writel(control, &port->scontrol);
|
||||
while (--tout) {
|
||||
status = readl(&port->sstatus) & MVSATA_SSTATUS_DET_MASK;
|
||||
if (status == MVSATA_SSTATUS_DET_DEVCOMM)
|
||||
break;
|
||||
udelay(1);
|
||||
}
|
||||
control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
|
||||
writel(control, &port->scontrol);
|
||||
}
|
||||
|
||||
/*
|
||||
* ide_preinit() will be called by ide_init in cmd_ide.c and will
|
||||
* reset the MVSTATHC ports needed by the board.
|
||||
*/
|
||||
|
||||
int ide_preinit(void)
|
||||
{
|
||||
/* Enable ATA port 0 (could be SATA port 0 or 1) if declared */
|
||||
#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
|
||||
mvsata_ide_initialize_port(
|
||||
(struct mvsata_port_registers *)
|
||||
(CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET));
|
||||
#endif
|
||||
/* Enable ATA port 1 (could be SATA port 0 or 1) if declared */
|
||||
#if defined(CONFIG_SYS_ATA_IDE1_OFFSET)
|
||||
mvsata_ide_initialize_port(
|
||||
(struct mvsata_port_registers *)
|
||||
(CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE1_OFFSET));
|
||||
#endif
|
||||
/* return 0 as we always succeed */
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -138,6 +138,7 @@
|
|||
#define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */
|
||||
#define CONFIG_IDE_SWAP_IO
|
||||
|
||||
/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@
|
|||
|
||||
#define ORION5X_MPP0_7 0x00000003
|
||||
#define ORION5X_MPP8_15 0x55550000
|
||||
#define ORION5X_MPP16_23 0x00000000
|
||||
#define ORION5X_MPP16_23 0x00005555
|
||||
|
||||
/*
|
||||
* Board-specific values for Orion5x GPIO low level init:
|
||||
|
|
@ -131,6 +131,7 @@
|
|||
* Commands configuration - using default command set for now
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_IDE
|
||||
|
||||
/*
|
||||
* Network
|
||||
|
|
@ -149,6 +150,37 @@
|
|||
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IDE
|
||||
*/
|
||||
#ifdef CONFIG_CMD_IDE
|
||||
#define __io
|
||||
#define CONFIG_IDE_PREINIT
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_CMD_EXT2
|
||||
/* ED Mini V has an IDE-compatible SATA connector for port 1 */
|
||||
#define CONFIG_MVSATA_IDE
|
||||
#define CONFIG_MVSATA_IDE_USE_PORT1
|
||||
/* Needs byte-swapping for ATA data register */
|
||||
#define CONFIG_IDE_SWAP_IO
|
||||
/* Data, registers and alternate blocks are at the same offset */
|
||||
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
|
||||
/* Each 8-bit ATA register is aligned to a 4-bytes address */
|
||||
#define CONFIG_SYS_ATA_STRIDE 4
|
||||
/* Controller supports 48-bits LBA addressing */
|
||||
#define CONFIG_LBA48
|
||||
/* A single bus, a single device */
|
||||
#define CONFIG_SYS_IDE_MAXBUS 1
|
||||
#define CONFIG_SYS_IDE_MAXDEVICE 1
|
||||
/* ATA registers base is at SATA controller base */
|
||||
#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE
|
||||
/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
|
||||
#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET
|
||||
/* end of IDE defines */
|
||||
#endif /* CMD_IDE */
|
||||
|
||||
/*
|
||||
* Environment variables configurations
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -122,5 +122,6 @@
|
|||
#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */
|
||||
#define CONFIG_IDE_SWAP_IO
|
||||
|
||||
#endif /* __MS7720SE_H */
|
||||
|
|
|
|||
|
|
@ -103,6 +103,7 @@
|
|||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_CMD_IDE
|
||||
|
||||
/*
|
||||
* NAND configuration
|
||||
|
|
@ -204,6 +205,36 @@
|
|||
#define CONFIG_SUPPORT_VFAT
|
||||
#endif /* CONFIG_CMD_USB */
|
||||
|
||||
/*
|
||||
* IDe Support on SATA port0
|
||||
*/
|
||||
#ifdef CONFIG_CMD_IDE
|
||||
#define __io
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_MVSATA_IDE
|
||||
#define CONFIG_IDE_PREINIT
|
||||
#define CONFIG_MVSATA_IDE_USE_PORT1
|
||||
/* Needs byte-swapping for ATA data register */
|
||||
#define CONFIG_IDE_SWAP_IO
|
||||
/* Data, registers and alternate blocks are at the same offset */
|
||||
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
|
||||
/* Each 8-bit ATA register is aligned to a 4-bytes address */
|
||||
#define CONFIG_SYS_ATA_STRIDE 4
|
||||
/* Controller supports 48-bits LBA addressing */
|
||||
#define CONFIG_LBA48
|
||||
/* CONFIG_CMD_IDE requires some #defines for ATA registers */
|
||||
#define CONFIG_SYS_IDE_MAXBUS 2
|
||||
#define CONFIG_SYS_IDE_MAXDEVICE 2
|
||||
/* ATA registers base is at SATA controller base */
|
||||
#define CONFIG_SYS_ATA_BASE_ADDR KW_SATA_BASE
|
||||
/* ATA bus 0 is Kirkwood port 0 on openrd */
|
||||
#define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET
|
||||
/* ATA bus 1 is Kirkwood port 1 on openrd */
|
||||
#define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET
|
||||
#endif /* CONFIG_CMD_IDE */
|
||||
|
||||
/*
|
||||
* File system
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -96,6 +96,7 @@
|
|||
#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
|
||||
#define CONFIG_IDE_SWAP_IO
|
||||
|
||||
/*
|
||||
* SuperH PCI Bridge Configration
|
||||
|
|
|
|||
|
|
@ -171,6 +171,7 @@
|
|||
#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
|
||||
#define CONFIG_IDE_SWAP_IO
|
||||
#endif /* CONFIG_CMD_IDE */
|
||||
|
||||
#endif /* __R7780RP_H */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue