3 commits

Author	SHA1	Message	Date
york	076bff8f47	powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 ... Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual rank with 512MB each rank. Also check dimm size and rank size for memory controller interleaving Signed-off-by: York Sun <yorksun@freescale.com>	2010-07-26 13:16:09 -05:00
Kumar Gala	79e4e6480b	powerpc/8xxx: Enabled hwconfig for memory interleaving ... Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with hwconfig parameters. The syntax is setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>" The mode values for memory controller interleaving are cacheline page bank superbank The mode values for bank interleaving are cs0_cs1 cs2_cs3 cs0_cs1_and_cs2_cs3 cs0_cs1_cs2_cs3 Signed-off-by: York Sun <yorksun@freescale.com>	2010-07-26 13:16:08 -05:00
Stefan Roese	a47a12becf	Move arch/ppc to arch/powerpc ... As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>	2010-04-21 23:42:38 +02:00

Renamed from arch/ppc/cpu/mpc8xxx/ddr/options.c (Browse further)