Rick Chen 039ed7c572 riscv: nx25: dts: Add AE250 dts to support RISC-V ... AE250 is the Soc using NX25 cpu core base on RISC-V arch. Details please see the doc/README.ae250. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>		2018-01-12 08:05:12 -05:00
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cpu/nx25	riscv: cpu: Add nx25 to support RISC-V	2018-01-12 08:05:12 -05:00
dts	riscv: nx25: dts: Add AE250 dts to support RISC-V	2018-01-12 08:05:12 -05:00
lib	riscv: nx25: lib: Add relative lib funcs to support RISC-V	2018-01-12 08:05:12 -05:00