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27c4792cd2
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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| .. | ||
| byteorder | ||
| mtd | ||
| unaligned | ||
| usb | ||
| apm_bios.h | ||
| arm-smccc.h | ||
| bch.h | ||
| bitfield.h | ||
| bitops.h | ||
| bitrev.h | ||
| bug.h | ||
| build_bug.h | ||
| compat.h | ||
| compiler-clang.h | ||
| compiler-gcc.h | ||
| compiler-intel.h | ||
| compiler.h | ||
| crc7.h | ||
| crc8.h | ||
| crc32.h | ||
| ctype.h | ||
| delay.h | ||
| dma-direction.h | ||
| drm_dp_helper.h | ||
| edd.h | ||
| err.h | ||
| errno.h | ||
| ethtool.h | ||
| fb.h | ||
| immap_qe.h | ||
| input.h | ||
| io.h | ||
| ioctl.h | ||
| iopoll.h | ||
| ioport.h | ||
| kbuild.h | ||
| kconfig.h | ||
| kernel.h | ||
| libfdt.h | ||
| libfdt_env.h | ||
| linkage.h | ||
| linux_string.h | ||
| list.h | ||
| list_sort.h | ||
| log2.h | ||
| lzo.h | ||
| math64.h | ||
| mbus.h | ||
| mc146818rtc.h | ||
| mdio.h | ||
| mii.h | ||
| netdevice.h | ||
| poison.h | ||
| posix_types.h | ||
| printk.h | ||
| psci.h | ||
| rbtree.h | ||
| rbtree_augmented.h | ||
| screen_info.h | ||
| serial_reg.h | ||
| sizes.h | ||
| stat.h | ||
| stddef.h | ||
| string.h | ||
| stringify.h | ||
| time.h | ||
| typecheck.h | ||
| types.h | ||