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When chip select interleaving is enabled, cs0_bnds is used for address binding. Other csn_bnds are not used. When two controllers interleaving is enabled, cs0_bnds of both controllers are used, other csn_bnds are not. However, the unused csn_bnds may be used internally for calculating addresses for calibration. Setting those registers to 0 may confuse controllers in some cases. Instead, setting them to 0xffffffff together with normal LAWs will guarantee the address is not mapped to DDR. Signed-off-by: York Sun <yorksun@freescale.com> |
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| 74xx_7xx | ||
| mpc5xx | ||
| mpc5xxx | ||
| mpc8xx | ||
| mpc8xxx | ||
| mpc83xx | ||
| mpc85xx | ||
| mpc86xx | ||
| mpc512x | ||
| mpc824x | ||
| mpc8260 | ||
| ppc4xx | ||