Pragnesh Patel 8a3fd8440f sifive: dts: fu540: Add DDR controller and phy register settings ... Add DDR controller and phy register settings, taken from fsbl (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>		2020-06-04 09:44:08 +08:00
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cpu	riscv: Add _image_binary_end for SPL	2020-06-04 09:44:08 +08:00
dts	sifive: dts: fu540: Add DDR controller and phy register settings	2020-06-04 09:44:08 +08:00
include/asm	riscv: Move all SMP related SBI calls to SBI_v01	2020-05-26 15:50:08 +08:00
lib	riscv: Move all SMP related SBI calls to SBI_v01	2020-05-26 15:50:08 +08:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	riscv: Make SBI v0.2 the default SBI version	2020-04-23 10:14:06 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00