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pinctrl: starfive: replace sf to starfive

Browse source 
for upstream, sf in dts should replace to starfive

Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
This commit is contained in:
Jianlong Huang 2022-08-25 11:31:56 +08:00
parent 4c5966a0c9
commit 86a842cd55
6 changed files with 974 additions and 997 deletions
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70
arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-sdio.dts
View file

@ -11,56 +11,56 @@
__overlay__ {
dt_sdcard1_pins: dt-sdcard1-pins {
sdcard1-pins0 {
sf,pins = <PAD_GPIO56>;
sf,pinmux = <PAD_GPIO56_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
sf,pin-gpio-doen = <OEN_LOW>;
starfive,pins = <PAD_GPIO56>;
starfive,pinmux = <PAD_GPIO56_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
starfive,pin-gpio-doen = <OEN_LOW>;
};
sdcard1-pins1 {
sf,pins = <PAD_GPIO50>;
sf,pinmux = <PAD_GPIO50_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
sf,pin-gpio-din = <GPI_SDIO1_CCMD_IN>;
starfive,pins = <PAD_GPIO50>;
starfive,pinmux = <PAD_GPIO50_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
starfive,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
starfive,pin-gpio-din = <GPI_SDIO1_CCMD_IN>;
};
sdcard1-pins2 {
sf,pins = <PAD_GPIO49>;
sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_0>;
starfive,pins = <PAD_GPIO49>;
starfive,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_0>;
};
sdcard1-pins3 {
sf,pins = <PAD_GPIO45>;
sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_1>;
starfive,pins = <PAD_GPIO45>;
starfive,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_1>;
};
sdcard1-pins4 {
sf,pins = <PAD_GPIO62>;
sf,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_2>;
starfive,pins = <PAD_GPIO62>;
starfive,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_2>;
};
sdcard1-pins5 {
sf,pins = <PAD_GPIO40>;
sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_3>;
starfive,pins = <PAD_GPIO40>;
starfive,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_3>;
};
};
};

154
arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart4-emmc.dts
View file

@ -11,111 +11,111 @@
__overlay__ {
dt_emmc0_pins: dt-emmc0-pins {
emmc0-pins-rest {
sf,pins = <PAD_GPIO22>;
sf,pinmux = <PAD_GPIO22_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
sf,pin-gpio-doen = <OEN_LOW>;
starfive,pins = <PAD_GPIO22>;
starfive,pinmux = <PAD_GPIO22_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO0_RST_N>;
starfive,pin-gpio-doen = <OEN_LOW>;
};
};
dt_emmc1_pins: dt-emmc1-pins {
emmc1-pins0-rest {
sf,pins = <PAD_GPIO51>;
sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_RST_N>;
sf,pin-gpio-doen = <OEN_LOW>;
starfive,pins = <PAD_GPIO51>;
starfive,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_RST_N>;
starfive,pin-gpio-doen = <OEN_LOW>;
};
emmc1-pins1 {
sf,pins = <PAD_GPIO38>;
sf,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
sf,pin-gpio-doen = <OEN_LOW>;
starfive,pins = <PAD_GPIO38>;
starfive,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
starfive,pin-gpio-doen = <OEN_LOW>;
};
emmc1-pins2 {
sf,pins = <PAD_GPIO36>;
sf,pinmux = <PAD_GPIO36_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
sf,pin-gpio-din = <GPI_SDIO1_CCMD_IN>;
starfive,pins = <PAD_GPIO36>;
starfive,pinmux = <PAD_GPIO36_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
starfive,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
starfive,pin-gpio-din = <GPI_SDIO1_CCMD_IN>;
};
emmc1-pins3 {
sf,pins = <PAD_GPIO43>;
sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_0>;
starfive,pins = <PAD_GPIO43>;
starfive,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_0>;
};
emmc1-pins4 {
sf,pins = <PAD_GPIO48>;
sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_1>;
starfive,pins = <PAD_GPIO48>;
starfive,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_1>;
};
emmc1-pins5 {
sf,pins = <PAD_GPIO53>;
sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_2>;
starfive,pins = <PAD_GPIO53>;
starfive,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_2>;
};
emmc1-pins6 {
sf,pins = <PAD_GPIO63>;
sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_3>;
starfive,pins = <PAD_GPIO63>;
starfive,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_3>;
};
emmc1-pins7 {
sf,pins = <PAD_GPIO52>;
sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_4>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_4>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_4>;
starfive,pins = <PAD_GPIO52>;
starfive,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_4>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_4>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_4>;
};
emmc1-pins8 {
sf,pins = <PAD_GPIO39>;
sf,pinmux = <PAD_GPIO39_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_5>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_5>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_5>;
starfive,pins = <PAD_GPIO39>;
starfive,pinmux = <PAD_GPIO39_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_5>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_5>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_5>;
};
emmc1-pins9 {
sf,pins = <PAD_GPIO46>;
sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_6>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_6>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_6>;
starfive,pins = <PAD_GPIO46>;
starfive,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_6>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_6>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_6>;
};
emmc1-pins10 {
sf,pins = <PAD_GPIO47>;
sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_7>;
sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_7>;
sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_7>;
starfive,pins = <PAD_GPIO47>;
starfive,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_7>;
starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_7>;
starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_7>;
};
};
};
@ -127,17 +127,17 @@
__overlay__ {
dt_pwm_ch6to7_pins: dt-pwm-ch6to7-pins {
pwm-ch6-pins {
sf,pins = <PAD_RGPIO0>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_6>;
sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_6>;
starfive,pins = <PAD_RGPIO0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_6>;
starfive,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_6>;
};
pwm-ch7-pins {
sf,pins = <PAD_RGPIO1>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_7>;
sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_7>;
starfive,pins = <PAD_RGPIO1>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_7>;
starfive,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_7>;
};
};
};

56
arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart5-pwm.dts
View file

@ -11,35 +11,35 @@
__overlay__ {
dt_pwm_ch0to3_pins: dt-pwm-ch0to3-pins {
pwm_ch0-pins {
sf,pins = <PAD_GPIO45>;
sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <GPO_PTC0_PWM_0>;
sf,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
starfive,pins = <PAD_GPIO45>;
starfive,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <GPO_PTC0_PWM_0>;
starfive,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
};
pwm_ch1-pins {
sf,pins = <PAD_GPIO46>;
sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <GPO_PTC0_PWM_1>;
sf,pin-gpio-doen = <OEN_PTC0_PWM_1_OE_N>;
starfive,pins = <PAD_GPIO46>;
starfive,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <GPO_PTC0_PWM_1>;
starfive,pin-gpio-doen = <OEN_PTC0_PWM_1_OE_N>;
};
pwm_ch2-pins {
sf,pins = <PAD_GPIO47>;
sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <GPO_PTC0_PWM_2>;
sf,pin-gpio-doen = <OEN_PTC0_PWM_2_OE_N>;
starfive,pins = <PAD_GPIO47>;
starfive,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <GPO_PTC0_PWM_2>;
starfive,pin-gpio-doen = <OEN_PTC0_PWM_2_OE_N>;
};
pwm_ch3-pins {
sf,pins = <PAD_GPIO48>;
sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <GPO_PTC0_PWM_3>;
sf,pin-gpio-doen = <OEN_PTC0_PWM_3_OE_N>;
starfive,pins = <PAD_GPIO48>;
starfive,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <GPO_PTC0_PWM_3>;
starfive,pin-gpio-doen = <OEN_PTC0_PWM_3_OE_N>;
};
};
};
@ -51,17 +51,17 @@
__overlay__ {
dt_pwm_ch4to5_pins: dt-pwm-ch4to5-pins {
pwm-ch4-pins {
sf,pins = <PAD_RGPIO0>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_4>;
sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_4>;
starfive,pins = <PAD_RGPIO0>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_4>;
starfive,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_4>;
};
pwm-ch5-pins {
sf,pins = <PAD_RGPIO1>;
sf,pin-ioconfig = <IO(GPIO_IE(1))>;
sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_5>;
sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_5>;
starfive,pins = <PAD_RGPIO1>;
starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
starfive,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_5>;
starfive,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_5>;
};
};
};

1626
arch/riscv/boot/dts/starfive/jh7110-evb-pinctrl.dtsi
View file

File diff suppressed because it is too large Load diff

30
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
View file

@ -1069,10 +1069,10 @@ static void starfive_jh7110_sys_parse_pin_config(
+ SYS_GPO_PDA_89_94_CFG_BASE_REG;
}
if (!of_property_read_u32(np, "sf,pin-ioconfig", &value))
if (!of_property_read_u32(np, "starfive,pin-ioconfig", &value))
pin_data->pin_config.io_config = value;
list = of_get_property(np, "sf,pinmux", &size);
list = of_get_property(np, "starfive,pinmux", &size);
if (list) {
pin_reg->func_sel_reg = be32_to_cpu(*list++);
pin_reg->func_sel_shift = be32_to_cpu(*list++);
@ -1080,7 +1080,7 @@ static void starfive_jh7110_sys_parse_pin_config(
pin_data->pin_config.pinmux_func = be32_to_cpu(*list++);
}
list = of_get_property(np, "sf,padmux", &size);
list = of_get_property(np, "starfive,padmux", &size);
if (list) {
pin_reg->pad_sel_reg = be32_to_cpu(*list++);
pin_reg->pad_sel_shift = be32_to_cpu(*list++);
@ -1088,7 +1088,7 @@ static void starfive_jh7110_sys_parse_pin_config(
pin_data->pin_config.padmux_func = be32_to_cpu(*list++);
}
list = of_get_property(np, "sf,pin-syscon", &size);
list = of_get_property(np, "starfive,pin-syscon", &size);
if (list) {
pin_reg->syscon_reg = be32_to_cpu(*list++);
pin_data->pin_config.syscon = be32_to_cpu(*list++);
@ -1098,21 +1098,21 @@ static void starfive_jh7110_sys_parse_pin_config(
pin_data->pin_config.gpio_num = pin_data->pin;
n = pin_data->pin_config.gpio_num >> GPIO_NUM_SHIFT;
if (!of_property_read_u32(np, "sf,pin-gpio-dout", &value)) {
if (!of_property_read_u32(np, "starfive,pin-gpio-dout", &value)) {
pin_data->pin_config.gpio_dout = value;
pin_reg->gpo_dout_reg = info->dout_reg_base + n * 4;
}
if (!of_property_read_u32(np, "sf,pin-gpio-doen", &value)) {
if (!of_property_read_u32(np, "starfive,pin-gpio-doen", &value)) {
pin_data->pin_config.gpio_doen = value;
pin_reg->gpo_doen_reg = info->doen_reg_base + n * 4;
}
list_din = of_get_property(np, "sf,pin-gpio-din", &size_din);
list_din = of_get_property(np, "starfive,pin-gpio-din", &size_din);
if (list_din) {
if (!size_din || size_din % pin_size) {
dev_err(pctl->dev,
"Invalid sf,pin-gpio-din property in node\n");
"Invalid starfive,pin-gpio-din property in node\n");
return;
}
@ -1232,10 +1232,10 @@ static void starfive_jh7110_aon_parse_pin_config(
AON_GPO_PDA_0_5_CFG_BASE_REG;
}
if (!of_property_read_u32(np, "sf,pin-ioconfig", &value))
if (!of_property_read_u32(np, "starfive,pin-ioconfig", &value))
pin_data->pin_config.io_config = value;
list = of_get_property(np, "sf,pinmux", &size);
list = of_get_property(np, "starfive,pinmux", &size);
if (list) {
pin_reg->func_sel_reg = be32_to_cpu(*list++);
pin_reg->func_sel_shift = be32_to_cpu(*list++);
@ -1243,7 +1243,7 @@ static void starfive_jh7110_aon_parse_pin_config(
pin_data->pin_config.pinmux_func = be32_to_cpu(*list++);
}
list = of_get_property(np, "sf,pin-syscon", &size);
list = of_get_property(np, "starfive,pin-syscon", &size);
if (list) {
pin_reg->syscon_reg = be32_to_cpu(*list++);
pin_data->pin_config.syscon = be32_to_cpu(*list++);
@ -1254,17 +1254,17 @@ static void starfive_jh7110_aon_parse_pin_config(
pin_reg->gpo_dout_reg = info->dout_reg_base;
pin_reg->gpo_doen_reg = info->doen_reg_base;
if (!of_property_read_u32(np, "sf,pin-gpio-dout", &value))
if (!of_property_read_u32(np, "starfive,pin-gpio-dout", &value))
pin_data->pin_config.gpio_dout = value;
if (!of_property_read_u32(np, "sf,pin-gpio-doen", &value))
if (!of_property_read_u32(np, "starfive,pin-gpio-doen", &value))
pin_data->pin_config.gpio_doen = value;
list_din = of_get_property(np, "sf,pin-gpio-din", &size_din);
list_din = of_get_property(np, "starfive,pin-gpio-din", &size_din);
if (list_din) {
if (!size_din || size_din % pin_size) {
dev_err(pctl->dev,
"Invalid sf,pin-gpio-din property in node\n");
"Invalid starfive,pin-gpio-din property in node\n");
return;
}
pin_data->pin_config.gpio_din_num = size_din / pin_size;

35
drivers/pinctrl/starfive/pinctrl-starfive.c
View file

@ -79,10 +79,10 @@ static int starfive_dt_node_to_map(struct pinctrl_dev *pctldev,
pin_size = STARFIVE_PINS_SIZE;
for_each_child_of_node(np, child) {
list = of_get_property(child, "sf,pins", &psize);
list = of_get_property(child, "starfive,pins", &psize);
if (!list) {
dev_err(sfp->dev,
"no sf,pins and pins property in node %pOF\n", np);
"no starfive,pins and pins property in node %pOF\n", np);
return -EINVAL;
}
size += psize;
@ -90,7 +90,7 @@ static int starfive_dt_node_to_map(struct pinctrl_dev *pctldev,
if (!size || size % pin_size) {
dev_err(sfp->dev,
"Invalid sf,pins or pins property in node %pOF\n", np);
"Invalid starfive,pins or pins property in node %pOF\n", np);
return -EINVAL;
}
@ -139,10 +139,10 @@ static int starfive_dt_node_to_map(struct pinctrl_dev *pctldev,
nmaps += 1;
list = of_get_property(child, "sf,pins", &psize);
list = of_get_property(child, "starfive,pins", &psize);
if (!list) {
dev_err(sfp->dev,
"no sf,pins and pins property in node %pOF\n", np);
"no starfive,pins and pins property in node %pOF\n", np);
goto put_child;
}
child_num_pins = psize / pin_size;
@ -171,36 +171,13 @@ static int starfive_dt_node_to_map(struct pinctrl_dev *pctldev,
list++;
}
offset += i;
/*
map[nmaps].type = PIN_MAP_TYPE_MUX_GROUP;
map[nmaps].data.mux.function = np->name;
map[nmaps].data.mux.group = grpname;
nmaps += 1;
*/
ret = pinctrl_generic_add_group(pctldev,
grpname, pins_id, child_num_pins, pin_data);
if (ret < 0) {
dev_err(dev, "error adding group %s: %d\n", grpname, ret);
goto put_child;
}
#if 0
ret = pinconf_generic_parse_dt_config(child, pctldev,
&map[nmaps].data.configs.configs,
&map[nmaps].data.configs.num_configs);
if (ret) {
dev_err(dev, "error parsing pin config of group %s: %d\n",
grpname, ret);
goto put_child;
}
/* don't create a map if there are no pinconf settings */
if (map[nmaps].data.configs.num_configs == 0)
continue;
map[nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
map[nmaps].data.configs.group_or_pin = grpname;
nmaps += 1;
#endif
}
ret = pinmux_generic_add_function(pctldev, np->name, pgnames, ngroups, NULL);