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dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property
Add the 'uncached-offset' property to be used for specifying the uncached memory offset required for handling non-coherent DMA transactions. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230211031821.976408-3-cristian.ciocaltea@collabora.com
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@ -74,6 +74,11 @@ properties:
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next-level-cache: true
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uncached-offset:
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$ref: /schemas/types.yaml#/definitions/uint64
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description: |
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Uncached memory offset for handling non-coherent DMA transactions.
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memory-region:
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maxItems: 1
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description: |
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