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[feat][nmsis] add nmsis component and nn,dsp demo
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jzlv
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989 changed files with 286224 additions and 0 deletions
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/*
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* Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved.
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* Copyright (c) 2019 Nuclei Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: NMSIS NN Library
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* Title: riscv_avgpool_s8.c
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* Description: Pooling function implementations
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*
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* $Date: May 29,2020
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* $Revision: V.2.0.1
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*
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* Target Processor: RISC-V Cores
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*
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* -------------------------------------------------------------------- */
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#include "ref_functions.h"
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#include "riscv_nnsupportfunctions.h"
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup Pooling
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* @{
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*/
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/*
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* s8 average pooling function
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*
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* Refer to header file for details.
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*
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*/
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riscv_status riscv_avgpool_s8_ref(const nmsis_nn_context *ctx,
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const nmsis_nn_pool_params *pool_params,
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const nmsis_nn_dims *input_dims,
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const q7_t *src,
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const nmsis_nn_dims *filter_dims,
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const nmsis_nn_dims *output_dims,
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q7_t *dst)
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{
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const int32_t dim_src_height = input_dims->h;
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const int32_t dim_src_width = input_dims->w;
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const int32_t dim_dst_height = output_dims->h;
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const int32_t dim_dst_width = output_dims->w;
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const int32_t stride_height = pool_params->stride.h;
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const int32_t stride_width = pool_params->stride.w;
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const int32_t dim_kernel_height = filter_dims->h;
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const int32_t dim_kernel_width = filter_dims->w;
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const int32_t padding_height = pool_params->padding.h;
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const int32_t padding_width = pool_params->padding.w;
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const int32_t act_min = pool_params->activation.min;
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const int32_t act_max = pool_params->activation.max;
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const int32_t ch_src = input_dims->c;
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q15_t *bufferA = (q15_t *)ctx->buf;
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/* Reference C code adapted from NMSIS-NN riscv_avepool_q7_HWC.
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*/
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(void)bufferA;
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int16_t i_ch_in, i_x, i_y;
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int16_t k_x, k_y;
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for (i_y = 0; i_y < dim_dst_height; i_y++)
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{
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for (i_x = 0; i_x < dim_dst_width; i_x++)
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{
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for (i_ch_in = 0; i_ch_in < ch_src; i_ch_in++)
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{
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int sum = 0;
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int count = 0;
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for (k_y = i_y * stride_height - padding_height; k_y < i_y * stride_height - padding_height + dim_kernel_height; k_y++)
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{
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for (k_x = i_x * stride_width - padding_width; k_x < i_x * stride_width - padding_width + dim_kernel_width; k_x++)
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{
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if (k_y >= 0 && k_x >= 0 && k_y < dim_src_height && k_x < dim_src_width)
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{
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sum += src[i_ch_in + ch_src * (k_x + k_y * dim_src_width)];
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count++;
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}
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}
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}
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sum = sum > 0 ? (sum + count / 2) / count : (sum - count / 2) / count;
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sum = MAX(sum, act_min);
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sum = MIN(sum, act_max);
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dst[i_ch_in + ch_src * (i_x + i_y * dim_dst_width)] = sum;
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}
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}
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}
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return RISCV_MATH_SUCCESS;
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}
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int32_t riscv_avgpool_s8_get_buffer_size_ref(const int dim_dst_width,
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const int ch_src)
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{
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(void)dim_dst_width;
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(void)ch_src;
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return 0;
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}
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/**
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* @} end of Pooling group
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*/
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@ -0,0 +1,204 @@
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/*
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* Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved.
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* Copyright (c) 2019 Nuclei Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: NMSIS NN Library
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* Title: riscv_max_pool_s8.c
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* Description: Pooling function implementations
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*
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* $Date: June 11, 2020
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* $Revision: V.2.0.0
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*
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* Target Processor: RISC-V Cores
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*
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* -------------------------------------------------------------------- */
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#include "ref_functions.h"
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#include "riscv_nnsupportfunctions.h"
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static void compare_and_replace_if_larger_q7_ref(q7_t *base,
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const q7_t *target,
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int32_t length)
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{
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q7_t *dst = base;
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const q7_t *src = target;
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union riscv_nnword ref_max;
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union riscv_nnword comp_max;
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int32_t cnt = length >> 2;
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while (cnt > 0l)
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{
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ref_max.word = riscv_nn_read_q7x4(dst);
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comp_max.word = riscv_nn_read_q7x4_ia(&src);
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if (comp_max.bytes[0] > ref_max.bytes[0])
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{
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ref_max.bytes[0] = comp_max.bytes[0];
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}
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if (comp_max.bytes[1] > ref_max.bytes[1])
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{
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ref_max.bytes[1] = comp_max.bytes[1];
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}
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if (comp_max.bytes[2] > ref_max.bytes[2])
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{
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ref_max.bytes[2] = comp_max.bytes[2];
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}
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if (comp_max.bytes[3] > ref_max.bytes[3])
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{
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ref_max.bytes[3] = comp_max.bytes[3];
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}
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write_q7x4_ia(&dst, ref_max.word);
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cnt--;
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}
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cnt = length & 0x3;
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while (cnt > 0l)
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{
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if (*src > *dst)
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{
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*dst = *src;
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}
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dst++;
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src++;
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cnt--;
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}
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}
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static void
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clamp_output_ref(q7_t *source, int32_t length, const int32_t act_min, const int32_t act_max)
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{
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union riscv_nnword in;
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int32_t cnt = length >> 2;
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while (cnt > 0l)
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{
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in.word = riscv_nn_read_q7x4(source);
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in.bytes[0] = MAX(in.bytes[0], act_min);
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in.bytes[0] = MIN(in.bytes[0], act_max);
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in.bytes[1] = MAX(in.bytes[1], act_min);
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in.bytes[1] = MIN(in.bytes[1], act_max);
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in.bytes[2] = MAX(in.bytes[2], act_min);
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in.bytes[2] = MIN(in.bytes[2], act_max);
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in.bytes[3] = MAX(in.bytes[3], act_min);
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in.bytes[3] = MIN(in.bytes[3], act_max);
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write_q7x4_ia(&source, in.word);
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cnt--;
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}
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cnt = length & 0x3;
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while (cnt > 0l)
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{
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int32_t comp = *source;
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comp = MAX(comp, act_min);
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comp = MIN(comp, act_max);
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*source++ = (int8_t)comp;
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cnt--;
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}
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}
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup Pooling
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* @{
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*/
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/*
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* Optimized s8 max pooling function
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*
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* Refer to header file for details.
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*
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*/
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riscv_status
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riscv_max_pool_s8_ref(const nmsis_nn_context *ctx,
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const nmsis_nn_pool_params *pool_params,
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const nmsis_nn_dims *input_dims,
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const q7_t *src,
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const nmsis_nn_dims *filter_dims,
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const nmsis_nn_dims *output_dims,
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q7_t *dst)
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{
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const int32_t input_y = input_dims->h;
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const int32_t input_x = input_dims->w;
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const int32_t output_y = output_dims->h;
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const int32_t output_x = output_dims->w;
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const int32_t stride_y = pool_params->stride.h;
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const int32_t stride_x = pool_params->stride.w;
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const int32_t kernel_y = filter_dims->h;
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const int32_t kernel_x = filter_dims->w;
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const int32_t pad_y = pool_params->padding.h;
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const int32_t pad_x = pool_params->padding.w;
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const int32_t act_min = pool_params->activation.min;
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const int32_t act_max = pool_params->activation.max;
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const int32_t channel_in = input_dims->c;
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(void)ctx;
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q7_t *dst_base = dst;
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for (int i_y = 0, base_idx_y = -pad_y; i_y < output_y; base_idx_y += stride_y, i_y++)
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{
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for (int i_x = 0, base_idx_x = -pad_x; i_x < output_x; base_idx_x += stride_x, i_x++)
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{
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/* Condition for kernel start dimension: (base_idx_<x,y> + kernel_<x,y>_start) >= 0 */
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const int32_t ker_y_start = MAX(0, -base_idx_y);
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const int32_t ker_x_start = MAX(0, -base_idx_x);
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/* Condition for kernel end dimension: (base_idx_<x,y> + kernel_<x,y>_end) < dim_src_<width,height> */
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const int32_t kernel_y_end = MIN(kernel_y, input_y - base_idx_y);
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const int32_t kernel_x_end = MIN(kernel_x, input_x - base_idx_x);
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int count = 0;
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for (int k_y = ker_y_start; k_y < kernel_y_end; k_y++)
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{
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for (int k_x = ker_x_start; k_x < kernel_x_end; k_x++)
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{
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const q7_t *start = src + channel_in * (k_x + base_idx_x + (k_y + base_idx_y) * input_x);
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if (count == 0)
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{
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memcpy(dst, start, channel_in);
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count++;
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}
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else
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{
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compare_and_replace_if_larger_q7_ref(dst, start, channel_in);
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}
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}
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}
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/* 'count' is expected to be non-zero here. */
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dst += channel_in;
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}
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}
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clamp_output_ref(dst_base, output_x * output_y * channel_in, act_min, act_max);
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return RISCV_MATH_SUCCESS;
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}
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/**
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* @} end of Pooling group
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*/
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@ -0,0 +1,177 @@
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/*
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* Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
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* Copyright (c) 2019 Nuclei Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
|
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* You may obtain a copy of the License at
|
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*
|
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
|
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
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* See the License for the specific language governing permissions and
|
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: NMSIS NN Library
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* Title: riscv_pool_q7_HWC.c
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* Description: Pooling function implementations
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*
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* $Date: 17. January 2018
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* $Revision: V.1.0.0
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*
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* Target Processor: RISC-V Cores
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*
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* -------------------------------------------------------------------- */
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#include "ref_functions.h"
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#include "riscv_nnsupportfunctions.h"
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup Pooling
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* @{
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*/
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/**
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* @brief Q7 max pooling function
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* @param[in, out] Im_in pointer to input tensor
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* @param[in] dim_im_in input tensor dimention
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* @param[in] ch_im_in number of input tensor channels
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* @param[in] dim_kernel filter kernel size
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* @param[in] padding padding sizes
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* @param[in] stride convolution stride
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* @param[in] dim_im_out output tensor dimension
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* @param[in,out] bufferA Not used
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* @param[in,out] Im_out pointer to output tensor
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*
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* @details
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*
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* The pooling function is implemented as split x-pooling then
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* y-pooling.
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*
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* This pooling function is input-destructive. Input data is undefined
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* after calling this function.
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*
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*/
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// REMOVED
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// void
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// riscv_maxpool_q7_HWC_ref(q7_t * Im_in,
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// const uint16_t dim_im_in,
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// const uint16_t ch_im_in,
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// const uint16_t dim_kernel,
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// const uint16_t padding,
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// const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
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// {
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// (void)bufferA;
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// /* Run the following code as reference implementation for RISC-V Core without DSP */
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// int16_t i_ch_in, i_x, i_y;
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// int16_t k_x, k_y;
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// for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
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// {
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// for (i_y = 0; i_y < dim_im_out; i_y++)
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// {
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// for (i_x = 0; i_x < dim_im_out; i_x++)
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// {
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// int max = -129;
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// for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
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// {
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// for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
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// {
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// if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
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// {
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// if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
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// {
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// max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
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// }
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// }
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// }
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// }
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// Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
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// }
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// }
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// }
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// }
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/**
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* @brief Q7 average pooling function
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* @param[in,out] Im_in pointer to input tensor
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* @param[in] dim_im_in input tensor dimention
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* @param[in] ch_im_in number of input tensor channels
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* @param[in] dim_kernel filter kernel size
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* @param[in] padding padding sizes
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* @param[in] stride convolution stride
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* @param[in] dim_im_out output tensor dimension
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* @param[in,out] bufferA pointer to buffer space for input
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* @param[in,out] Im_out pointer to output tensor
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*
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* @details
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*
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* <b>Buffer size:</b>
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*
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* bufferA size: 2*dim_im_out*ch_im_in
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*
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* The pooling function is implemented as split x-pooling then
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* y-pooling.
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*
|
||||
* This pooling function is input-destructive. Input data is undefined
|
||||
* after calling this function.
|
||||
*
|
||||
*/
|
||||
|
||||
// REMOVED
|
||||
|
||||
// void
|
||||
// riscv_avepool_q7_HWC_ref(q7_t * Im_in,
|
||||
// const uint16_t dim_im_in,
|
||||
// const uint16_t ch_im_in,
|
||||
// const uint16_t dim_kernel,
|
||||
// const uint16_t padding,
|
||||
// const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
|
||||
// {
|
||||
|
||||
// /* Run the following code as reference implementation for RISC-V Core without DSP */
|
||||
|
||||
// (void)bufferA;
|
||||
// int16_t i_ch_in, i_x, i_y;
|
||||
// int16_t k_x, k_y;
|
||||
|
||||
// for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
|
||||
// {
|
||||
// for (i_y = 0; i_y < dim_im_out; i_y++)
|
||||
// {
|
||||
// for (i_x = 0; i_x < dim_im_out; i_x++)
|
||||
// {
|
||||
// int sum = 0;
|
||||
// int count = 0;
|
||||
// for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
|
||||
// {
|
||||
// for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
|
||||
// {
|
||||
// if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
|
||||
// {
|
||||
// sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
|
||||
// count++;
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
// Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
|
||||
/**
|
||||
* @} end of Pooling group
|
||||
*/
|
||||
Loading…
Add table
Add a link
Reference in a new issue