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[feat][bl602] add bl602 support

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This commit is contained in:
jzlv 2022-10-24 19:15:50 +08:00
parent 05b93d802a
commit d075071312
57 changed files with 24070 additions and 33 deletions
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2
drivers/lhal/include/hardware/adc_reg.h
View file

@ -127,7 +127,7 @@
#if defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
#define AON_GPADC_SEN_SEL_MASK (0x7 << AON_GPADC_SEN_SEL_SHIFT)
#define AON_GPADC_SEN_TEST_EN (1 << 31U)
#elif defined(BL702)
#elif defined(BL702) || defined(BL602)
#define AON_GPADC_SEN_SEL_MASK (0x3 << AON_GPADC_SEN_SEL_SHIFT)
#define AON_GPADC_SEN_TEST_EN (1 << 30U)
#endif

2
drivers/lhal/include/hardware/dac_reg.h
View file

@ -129,7 +129,7 @@
#define GLB_GPDAC_B_OUTMUX_MASK (0x7 << GLB_GPDAC_B_OUTMUX_SHIFT)
/* 0x314 : gpdac_data */
#if defined(BL702) || defined(BL606P) || defined(BL808)
#if defined(BL702) || defined(BL602) || defined(BL606P) || defined(BL808)
#define GLB_GPDAC_B_DATA_SHIFT (0U)
#define GLB_GPDAC_B_DATA_MASK (0x3ff << GLB_GPDAC_B_DATA_SHIFT)
#define GLB_GPDAC_A_DATA_SHIFT (16U)

2
drivers/lhal/include/hardware/gpio_reg.h
View file

@ -1495,7 +1495,7 @@
#define GLB_GPIO_TX_DATA_TO_FIFO_SHIFT (0U)
#define GLB_GPIO_TX_DATA_TO_FIFO_MASK (0xffff<<GLB_GPIO_TX_DATA_TO_FIFO_SHIFT)
#elif defined(BL702)
#elif defined(BL702) || defined(BL602)
#define GLB_GPIO_CFGCTL0_OFFSET (0x100)/* GPIO_CFGCTL0 */
#define GLB_GPIO_CFGCTL1_OFFSET (0x104)/* GPIO_CFGCTL1 */

8
drivers/lhal/include/hardware/spi_reg.h
View file

@ -136,25 +136,25 @@
/* 0x84 : spi_fifo_config_1 */
#define SPI_TX_FIFO_CNT_SHIFT (0U)
#if defined(BL702)
#if defined(BL702) || defined(BL602)
#define SPI_TX_FIFO_CNT_MASK (0x7 << SPI_TX_FIFO_CNT_SHIFT)
#elif defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
#define SPI_TX_FIFO_CNT_MASK (0x3f << SPI_TX_FIFO_CNT_SHIFT)
#endif
#define SPI_RX_FIFO_CNT_SHIFT (8U)
#if defined(BL702)
#if defined(BL702) || defined(BL602)
#define SPI_RX_FIFO_CNT_MASK (0x7 << SPI_RX_FIFO_CNT_SHIFT)
#elif defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
#define SPI_RX_FIFO_CNT_MASK (0x3f << SPI_RX_FIFO_CNT_SHIFT)
#endif
#define SPI_TX_FIFO_TH_SHIFT (16U)
#if defined(BL702)
#if defined(BL702) || defined(BL602)
#define SPI_TX_FIFO_TH_MASK (0x3 << SPI_TX_FIFO_TH_SHIFT)
#elif defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
#define SPI_TX_FIFO_TH_MASK (0x1f << SPI_TX_FIFO_TH_SHIFT)
#endif
#define SPI_RX_FIFO_TH_SHIFT (24U)
#if defined(BL702)
#if defined(BL702) || defined(BL602)
#define SPI_RX_FIFO_TH_MASK (0x3 << SPI_RX_FIFO_TH_SHIFT)
#elif defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)
#define SPI_RX_FIFO_TH_MASK (0x1f << SPI_RX_FIFO_TH_SHIFT)