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Meson64 Le Potato Mainline u-boot (#998)
Le Potato and NanoPi K2 now both use 2018.03 mainline U-boot.
This commit is contained in:
Tony
GitHub
parent
d4f52f86a4
commit
ad07dbb900
7 changed files with 680 additions and 21 deletions
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@ -0,0 +1,35 @@
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From 7f0a669b9b283d14927c2ac89d05e2d24dd31ecb Mon Sep 17 00:00:00 2001
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From: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Date: Sat, 17 Mar 2018 12:24:44 +0100
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Subject: [PATCH 1/1] mmc: avoid division by zero in meson_mmc_config_clock
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The Odroid C2 fails to read from mmc with U-Boot v2018.03.
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The change avoids a division by zero.
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The fix was suggested by Jaehoon in
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https://lists.denx.de/pipermail/u-boot/2018-January/318577.html
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Reported-by: Vagrant Cascadian <vagrant@debian.org>
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Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
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Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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---
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drivers/mmc/meson_gx_mmc.c | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
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index a2cd5d3a44..454593eec4 100644
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--- a/drivers/mmc/meson_gx_mmc.c
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+++ b/drivers/mmc/meson_gx_mmc.c
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@@ -35,6 +35,9 @@ static void meson_mmc_config_clock(struct mmc *mmc)
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uint32_t meson_mmc_clk = 0;
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unsigned int clk, clk_src, clk_div;
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+ if (!mmc->clock)
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+ return;
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+
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/* 1GHz / CLK_MAX_DIV = 15,9 MHz */
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if (mmc->clock > 16000000) {
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clk = SD_EMMC_CLKSRC_DIV2;
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--
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2.14.2
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544
patch/u-boot/u-boot-meson64/1000-add-K2-WIP.patch
Normal file
544
patch/u-boot/u-boot-meson64/1000-add-K2-WIP.patch
Normal file
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@ -0,0 +1,544 @@
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 20a4c37..b1fcedc 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1108-evb.dtb
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dtb-$(CONFIG_ARCH_MESON) += \
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meson-gxbb-odroidc2.dtb \
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+ meson-gxbb-nanopi-k2.dtb \
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meson-gxl-s905x-p212.dtb \
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meson-gxl-s905x-libretech-cc.dtb \
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meson-gxl-s905x-khadas-vim.dtb
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diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
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new file mode 100644
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index 0000000..078a37c
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--- /dev/null
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+++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
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@@ -0,0 +1,330 @@
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+/*
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+ * Copyright (c) 2017 Andreas Färber
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This library is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This library is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ *
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+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+ */
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+
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+/dts-v1/;
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+
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+#include "meson-gxbb.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
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+ model = "FriendlyElec NanoPi-K2";
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+
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+ aliases {
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+ serial0 = &uart_AO;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x0 0x0 0x80000000>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ stat {
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+ label = "nanopi-k2:blue:stat";
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+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
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+ default-state = "on";
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+ panic-indicator;
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+ };
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+ };
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+
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+ vdd_5v: regulator-vdd-5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDD_5V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vddio_ao18: regulator-vddio-ao18 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDDIO_AO18";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+
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+ vddio_ao3v3: regulator-vddio-ao3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDDIO_AO3.3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+
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+ vddio_tf: regulator-vddio-tf {
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+ compatible = "regulator-gpio";
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+
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+ regulator-name = "VDDIO_TF";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
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+ gpios-states = <0>;
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+
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+ states = <3300000 0>,
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+ <1800000 1>;
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+
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+ regulator-settling-time-up-us = <100>;
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+ regulator-settling-time-down-us = <5000>;
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+ };
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+
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+ wifi_32k: wifi-32k {
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+ compatible = "pwm-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <32768>;
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+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
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+ clocks = <&wifi_32k>;
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+ clock-names = "ext_clock";
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+ };
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+
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+ vcc1v8: regulator-vcc1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VCC1.8V";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+
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+ vcc3v3: regulator-vcc3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VCC3.3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+
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+ emmc_pwrseq: emmc-pwrseq {
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+ compatible = "mmc-pwrseq-emmc";
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+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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+ };
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+};
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+
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+ðmac {
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+ status = "okay";
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+ pinctrl-0 = <ð_rgmii_pins>;
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+ pinctrl-names = "default";
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+
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+ phy-handle = <ð_phy0>;
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+ phy-mode = "rgmii";
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+
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+ amlogic,tx-delay-ns = <2>;
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+
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+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
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+ snps,reset-delays-us = <0 10000 1000000>;
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+ snps,reset-active-low;
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ eth_phy0: ethernet-phy@0 {
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+ /* Realtek RTL8211F (0x001cc916) */
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+ reg = <0>;
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+ };
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+ };
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+};
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+
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+&ir {
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+ status = "okay";
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+ pinctrl-0 = <&remote_input_ao_pins>;
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+ pinctrl-names = "default";
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+};
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+
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+&pinctrl_aobus {
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+ gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
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+ "VCCK En", "CON1 Header Pin31",
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+ "I2S Header Pin6", "IR In", "I2S Header Pin7",
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+ "I2S Header Pin3", "I2S Header Pin4",
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+ "I2S Header Pin5", "HDMI CEC", "SYS LED";
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+};
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+
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+&pinctrl_periphs {
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+ gpio-line-names = /* Bank GPIOZ */
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+ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
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+ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
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+ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
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+ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
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+ "Eth PHY nRESET", "Eth PHY Intc",
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+ /* Bank GPIOH */
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+ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL",
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+ "CON1 Header Pin33",
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+ /* Bank BOOT */
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+ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
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+ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
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+ "eMMC Reset", "eMMC CMD",
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+ "", "", "", "", "eMMC DS",
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+ "", "",
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+ /* Bank CARD */
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+ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
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+ "SDCard D3", "SDCard D2", "SDCard Det",
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+ /* Bank GPIODV */
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+ "", "", "", "", "", "", "", "", "", "", "", "", "",
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+ "", "", "", "", "", "", "", "", "", "", "",
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+ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
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+ "VDDEE Regulator", "VCCK Regulator",
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+ /* Bank GPIOY */
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+ "CON1 Header Pin7", "CON1 Header Pin11",
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+ "CON1 Header Pin13", "CON1 Header Pin15",
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+ "CON1 Header Pin18", "CON1 Header Pin19",
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+ "CON1 Header Pin22", "CON1 Header Pin21",
|
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+ "CON1 Header Pin24", "CON1 Header Pin23",
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+ "CON1 Header Pin26", "CON1 Header Pin29",
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+ "CON1 Header Pin32", "CON1 Header Pin8",
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+ "CON1 Header Pin10", "CON1 Header Pin16",
|
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+ "CON1 Header Pin12",
|
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+ /* Bank GPIOX */
|
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+ "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2",
|
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+ "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
|
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+ "WIFI Power Enable", "WIFI WAKE HOST",
|
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+ "Bluetooth PCM DOUT", "Bluetooth PCM DIN",
|
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+ "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
|
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+ "Bluetooth UART TX", "Bluetooth UART RX",
|
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+ "Bluetooth UART CTS", "Bluetooth UART RTS",
|
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+ "", "", "", "WIFI 32K", "Bluetooth Enable",
|
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+ "Bluetooth WAKE HOST",
|
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+ /* Bank GPIOCLK */
|
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+ "", "CON1 Header Pin35", "", "",
|
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+ /* GPIO_TEST_N */
|
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+ "";
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+};
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+
|
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+&pwm_ef {
|
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+ status = "okay";
|
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+ pinctrl-0 = <&pwm_e_pins>;
|
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+ pinctrl-names = "default";
|
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+ clocks = <&clkc CLKID_FCLK_DIV4>;
|
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+ clock-names = "clkin0";
|
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+};
|
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+
|
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+&saradc {
|
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+ status = "okay";
|
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+ vref-supply = <&vddio_ao18>;
|
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+};
|
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+
|
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+/* SD */
|
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+&sd_emmc_b {
|
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+ status = "okay";
|
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+ pinctrl-0 = <&sdcard_pins>;
|
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+ pinctrl-names = "default";
|
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+
|
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+ bus-width = <4>;
|
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+ cap-sd-highspeed;
|
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+ sd-uhs-sdr12;
|
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+ sd-uhs-sdr25;
|
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+ sd-uhs-sdr50;
|
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+ sd-uhs-sdr104;
|
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+ max-frequency = <200000000>;
|
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+ disable-wp;
|
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+
|
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+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
|
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+ cd-inverted;
|
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+
|
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+ vmmc-supply = <&vddio_ao3v3>;
|
||||
+ vqmmc-supply = <&vddio_tf>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-0 = <&emmc_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc3v3>;
|
||||
+ vqmmc-supply = <&vcc1v8>;
|
||||
+};
|
||||
+
|
||||
+/* DBG_UART */
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+/* Bluetooth on AP6212 */
|
||||
+&uart_A {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+/* 40-pin CON1 */
|
||||
+&uart_C {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-0 = <&uart_c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb0_phy {
|
||||
+ status = "okay";
|
||||
+ phy-supply = <&vdd_5v>;
|
||||
+};
|
||||
+
|
||||
+&usb1_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
|
||||
index 0350787..32d86b2 100644
|
||||
--- a/arch/arm/mach-meson/Kconfig
|
||||
+++ b/arch/arm/mach-meson/Kconfig
|
||||
@@ -26,7 +26,12 @@ config TARGET_ODROID_C2
|
||||
ODROID-C2 is a single board computer based on Meson GXBaby
|
||||
with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD
|
||||
slot, eMMC, IR receiver and a 40-pin GPIO header.
|
||||
-
|
||||
+config TARGET_NANOPI_K2
|
||||
+ bool "NANOPI_K2"
|
||||
+ help
|
||||
+ NANOPI K2 is a single board computer based on Meson GXBaby
|
||||
+ with 2 GiB of RAM, Gigabit Ethernet, AP6212 Wifi, HDMI, 4 USB,
|
||||
+ micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header.
|
||||
endif
|
||||
|
||||
if MESON_GXL
|
||||
@@ -62,6 +67,8 @@ config SYS_MALLOC_F_LEN
|
||||
|
||||
source "board/amlogic/odroid-c2/Kconfig"
|
||||
|
||||
+source "board/amlogic/nanopi-k2/Kconfig"
|
||||
+
|
||||
source "board/amlogic/p212/Kconfig"
|
||||
|
||||
source "board/amlogic/libretech-cc/Kconfig"
|
||||
diff --git a/board/amlogic/nanopi-k2/Kconfig b/board/amlogic/nanopi-k2/Kconfig
|
||||
new file mode 100644
|
||||
index 0000000..374bda2
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/nanopi-k2/Kconfig
|
||||
@@ -0,0 +1,12 @@
|
||||
+if TARGET_NANOPI_K2
|
||||
+
|
||||
+config SYS_BOARD
|
||||
+ default "nanopi-k2"
|
||||
+
|
||||
+config SYS_VENDOR
|
||||
+ default "amlogic"
|
||||
+
|
||||
+config SYS_CONFIG_NAME
|
||||
+ default "nanopi-k2"
|
||||
+
|
||||
+endif
|
||||
diff --git a/board/amlogic/nanopi-k2/Makefile b/board/amlogic/nanopi-k2/Makefile
|
||||
new file mode 100644
|
||||
index 0000000..d3e7a08
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/nanopi-k2/Makefile
|
||||
@@ -0,0 +1,7 @@
|
||||
+#
|
||||
+# (C) Copyright 2018 Thomas McKahan
|
||||
+#
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+
|
||||
+obj-y := nanopi-k2.o
|
||||
diff --git a/board/amlogic/nanopi-k2/nanopi-k2.c b/board/amlogic/nanopi-k2/nanopi-k2.c
|
||||
new file mode 100644
|
||||
index 0000000..8a2b5c7
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/nanopi-k2/nanopi-k2.c
|
||||
@@ -0,0 +1,64 @@
|
||||
+/*
|
||||
+ * (C) Copyright 2018 Thomas McKahan
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <dm.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/arch/gxbb.h>
|
||||
+#include <asm/arch/sm.h>
|
||||
+#include <asm/arch/eth.h>
|
||||
+#include <asm/arch/mem.h>
|
||||
+
|
||||
+#define EFUSE_SN_OFFSET 20
|
||||
+#define EFUSE_SN_SIZE 16
|
||||
+#define EFUSE_MAC_OFFSET 52
|
||||
+#define EFUSE_MAC_SIZE 6
|
||||
+
|
||||
+int board_init(void)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int misc_init_r(void)
|
||||
+{
|
||||
+ u8 mac_addr[EFUSE_MAC_SIZE];
|
||||
+ char serial[EFUSE_SN_SIZE];
|
||||
+ ssize_t len;
|
||||
+
|
||||
+ meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
|
||||
+
|
||||
+ /* Enable power and clock gate */
|
||||
+ setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
|
||||
+
|
||||
+ /* Reset PHY on GPIOZ_14 */
|
||||
+ clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
|
||||
+ clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
|
||||
+ mdelay(10);
|
||||
+ setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
|
||||
+
|
||||
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
+ mac_addr, EFUSE_MAC_SIZE);
|
||||
+ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
+ eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
+ }
|
||||
+
|
||||
+ if (!env_get("serial#")) {
|
||||
+ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
|
||||
+ EFUSE_SN_SIZE);
|
||||
+ if (len == EFUSE_SN_SIZE)
|
||||
+ env_set("serial#", serial);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int ft_board_setup(void *blob, bd_t *bd)
|
||||
+{
|
||||
+ meson_gx_init_reserved_memory(blob);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig
|
||||
new file mode 100644
|
||||
index 0000000..1ff1bff
|
||||
--- /dev/null
|
||||
+++ b/configs/nanopi-k2_defconfig
|
||||
@@ -0,0 +1,36 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_MESON_GXBB=y
|
||||
+CONFIG_TARGET_NANOPI_K2=y
|
||||
+CONFIG_IDENT_STRING=" nanopi-k2"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_DM_I2C=y
|
||||
+CONFIG_SYS_I2C_MESON=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_GXBB=y
|
||||
+CONFIG_DEBUG_UART_MESON=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xc81004c0
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
diff --git a/include/configs/nanopi-k2.h b/include/configs/nanopi-k2.h
|
||||
new file mode 100644
|
||||
index 0000000..471ebfb
|
||||
--- /dev/null
|
||||
+++ b/include/configs/nanopi-k2.h
|
||||
@@ -0,0 +1,20 @@
|
||||
+/*
|
||||
+ * Configuration for ODROID-C2
|
||||
+ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: GPL-2.0+
|
||||
+ */
|
||||
+
|
||||
+#ifndef __CONFIG_H
|
||||
+#define __CONFIG_H
|
||||
+
|
||||
+#define CONFIG_MISC_INIT_R
|
||||
+
|
||||
+/* Serial setup */
|
||||
+#define CONFIG_CONS_INDEX 0
|
||||
+
|
||||
+#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-nanopi-k2.dtb\0"
|
||||
+
|
||||
+#include <configs/meson-gxbb-common.h>
|
||||
+
|
||||
+#endif /* __CONFIG_H */
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h
|
||||
index 5794bc0..6f45a5c 100644
|
||||
--- a/include/configs/meson-gxbb-common.h
|
||||
+++ b/include/configs/meson-gxbb-common.h
|
||||
@@ -35,10 +35,14 @@
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_addr_r=0x01000000\0" \
|
||||
+ "dtb_mem_addr=0x01000000\0" \
|
||||
"scriptaddr=0x1f000000\0" \
|
||||
"kernel_addr_r=0x01080000\0" \
|
||||
"pxefile_addr_r=0x01080000\0" \
|
||||
+ "loadaddr=0x01080000\0" \
|
||||
"ramdisk_addr_r=0x13000000\0" \
|
||||
+ "initrd_start=0x13000000\0" \
|
||||
+ "bloader=ext4load mmc 0:1\0" \
|
||||
MESON_FDTFILE_SETTING \
|
||||
BOOTENV
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue