mirror of
https://github.com/Fishwaldo/build.git
synced 2025-06-05 13:51:45 +00:00
Meson64 dev - add missing patch that broke compilation for Odroid C4
This commit is contained in:
Igor Pecovnik
parent
bba8a86238
commit
c585e51044
1 changed files with 302 additions and 0 deletions
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@ -0,0 +1,302 @@
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The Khadas VIM3 shares the eMMC pins 4 to 7 with the SPI NOR, in order
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to enable the eMMC and the SPI NOR interface, we need to omit the
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4 last pins from the eMMC pinctrl.
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As it was done for the Khadas VIM2, split the eMMC pinctrls in ctrl, data
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and ds pins with either 4bits data or 8bits data, and update the current
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board accordingly.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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.../boot/dts/amlogic/meson-g12-common.dtsi | 40 ++++++++++++++-----
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.../boot/dts/amlogic/meson-g12a-sei510.dts | 2 +-
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.../boot/dts/amlogic/meson-g12a-u200.dts | 2 +-
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.../boot/dts/amlogic/meson-g12a-x96-max.dts | 2 +-
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.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 2 +-
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.../boot/dts/amlogic/meson-g12b-ugoos-am6.dts | 2 +-
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.../boot/dts/amlogic/meson-khadas-vim3.dtsi | 2 +-
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.../boot/dts/amlogic/meson-sm1-sei610.dts | 2 +-
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8 files changed, 37 insertions(+), 17 deletions(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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index 87b9a47a51b9..d09efb86ec33 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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@@ -295,17 +295,9 @@
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};
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};
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- emmc_pins: emmc {
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+ emmc_ctrl_pins: emmc-ctrl {
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mux-0 {
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- groups = "emmc_nand_d0",
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- "emmc_nand_d1",
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- "emmc_nand_d2",
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- "emmc_nand_d3",
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- "emmc_nand_d4",
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- "emmc_nand_d5",
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- "emmc_nand_d6",
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- "emmc_nand_d7",
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- "emmc_cmd";
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+ groups = "emmc_cmd";
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function = "emmc";
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bias-pull-up;
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drive-strength-microamp = <4000>;
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@@ -319,6 +311,34 @@
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};
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};
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+ emmc_data_4b_pins: emmc-data-4b {
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+ mux-0 {
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+ groups = "emmc_nand_d0",
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+ "emmc_nand_d1",
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+ "emmc_nand_d2",
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+ "emmc_nand_d3";
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+ function = "emmc";
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+ bias-pull-up;
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+ drive-strength-microamp = <4000>;
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+ };
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+ };
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+
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+ emmc_data_8b_pins: emmc-data-8b {
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+ mux-0 {
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+ groups = "emmc_nand_d0",
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+ "emmc_nand_d1",
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+ "emmc_nand_d2",
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+ "emmc_nand_d3",
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+ "emmc_nand_d4",
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+ "emmc_nand_d5",
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+ "emmc_nand_d6",
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+ "emmc_nand_d7";
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+ function = "emmc";
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+ bias-pull-up;
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+ drive-strength-microamp = <4000>;
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+ };
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+ };
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+
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emmc_ds_pins: emmc-ds {
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mux {
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groups = "emmc_nand_ds";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
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index 168f460e11fa..b00d0468c753 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
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@@ -472,7 +472,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
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index 2a324f0136e3..a26bfe72550f 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
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@@ -271,7 +271,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
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index 4f2596d82989..1b07c8c06eac 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
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@@ -443,7 +443,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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index 8830d3844885..b59ae1a297f2 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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@@ -435,7 +435,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
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index ccd0bced01e8..325e448eb09c 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
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@@ -485,7 +485,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
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index 90815fa25ec6..b6f22a0bd318 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
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@@ -312,7 +312,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
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index a8bb3fa9fec9..71cc730a4913 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
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@@ -518,7 +518,7 @@
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/* eMMC */
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&sd_emmc_c {
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status = "okay";
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- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
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+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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Add the controller and pinctrl nodes to enable the SPI Flash Controller
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on the Amlogic G12A and compatible SoCs.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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.../boot/dts/amlogic/meson-g12-common.dtsi | 20 +++++++++++++++++++
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1 file changed, 20 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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index d09efb86ec33..56a9f8eadf01 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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@@ -593,6 +593,17 @@
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};
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};
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+ nor_pins: nor {
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+ mux {
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+ groups = "nor_d",
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+ "nor_q",
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+ "nor_c",
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+ "nor_cs";
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+ function = "nor";
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+ bias-disable;
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+ };
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+ };
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+
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pdm_din0_a_pins: pdm-din0-a {
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mux {
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groups = "pdm_din0_a";
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@@ -2071,6 +2082,15 @@
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amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
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};
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+ spifc: spi@14000 {
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+ compatible = "amlogic,meson-gxbb-spifc";
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+ status = "disabled";
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+ reg = <0x0 0x14000 0x0 0x80>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&clkc CLKID_CLK81>;
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+ };
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+
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pwm_ef: pwm@19000 {
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compatible = "amlogic,meson-g12a-ee-pwm";
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reg = <0x0 0x19000 0x0 0x20>;
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Add disabled SPIFC controller node with instruction on how to enable
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it while lowering capabilities of the eMMC controller from 8bits bus
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width to 4bits bus width, it's data pins 4 to 7 being shared with
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the SPI NOR controller pins.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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.../boot/dts/amlogic/meson-khadas-vim3.dtsi | 20 +++++++++++++++++++
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1 file changed, 20 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
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index b6f22a0bd318..f09854560938 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
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@@ -328,6 +328,26 @@
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vqmmc-supply = <&emmc_1v8>;
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};
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+/*
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+ * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS
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+ * and eMMC Data 4 to 7 pins.
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+ * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
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+ * and change bus-width to 4 then spifc can be enabled.
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+ */
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+&spifc {
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+ status = "disabled";
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+ pinctrl-0 = <&nor_pins>;
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+ pinctrl-names = "default";
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+
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+ w25q32: spi-flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "winbond,w25q128fw", "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <104000000>;
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+ };
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+};
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+
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&uart_A {
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status = "okay";
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pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
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Add disabled SPIFC controller node with instruction on how to enable
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it while lowering capabilities of the eMMC controller from 8bits bus
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width to 4bits bus width, it's data pins 4 to 7 being shared with
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the SPI NOR controller pins.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 21 +++++++++++++++++++
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1 file changed, 21 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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index b59ae1a297f2..169ea283d4ee 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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@@ -451,6 +451,27 @@
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vqmmc-supply = <&flash_1v8>;
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};
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+/*
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+ * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins
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+ * and eMMC Data 4 to 7 pins.
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+ * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
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+ * and change bus-width to 4 then spifc can be enabled.
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+ * The SW1 slide should also be set to the correct position.
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+ */
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+&spifc {
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+ status = "disabled";
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+ pinctrl-0 = <&nor_pins>;
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+ pinctrl-names = "default";
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+
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+ mx25u64: spi-flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "mxicy,mx25u6435f", "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <104000000>;
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+ };
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+};
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+
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&tdmif_b {
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status = "okay";
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};
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