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Author SHA1 Message Date
Justin Hammond
58488f3969
Merge branch 'bl808/all' into ipc_rproc 2023-03-19 18:06:34 +08:00
Justin Hammond
9646ecaba8 WIP: add rpmsg-net driver 
* found on the Net. It works but needs some TLC
 2023-03-19 17:27:40 +08:00
Justin Hammond
0a00c2fe6f update rpmsg code: 
* increase MTU size for RPMSG data to 2032 (buffer size is 2048 minus 16 bytes for vring headers). This allows us to transmit faster and especially important for the next patch where we introduce a rpmsg-net (ethernet over rpmsg) driver and don't want to  fragment packets down to ~490 bytes)
* regardless of source address, we need to announce new rpmsg devices back to M0 for enumeration.
* rpmsg-tty device should rettry if there are no buffers available, as the M0 can be slower in processing vrings, causing frequent -ENOMEM errors on the linux side.

(this patch is debatable if it should upstream)
 2023-03-19 17:27:39 +08:00
Justin Hammond
a5945ddb57 add remoteproc nodes and reserved memory to dts 2023-03-19 17:27:29 +08:00
Justin Hammond
bfbf4abfe7 Add BL808 Remoteproc Driver 
* Only supports attaching to M0 core atm.
 2023-03-19 17:26:11 +08:00
Justin Hammond
43d37df6df Update DT for mailbox 
* Change cells to 3
* remove unused mailboxes for SDHCI and UART
 2023-03-19 17:25:47 +08:00
Alexander Horner
467fe3369e Merge branch 'bl808/usb' into bl808/all 2023-03-09 21:20:27 +00:00
Alexander Horner
d399b944cb Merge branch 'bl808/uart' into bl808/all 2023-03-09 21:20:24 +00:00
Alexander Horner
a1541d8bc1 Merge branch 'bl808/sdhci' into bl808/all 2023-03-09 21:20:21 +00:00
Alexander Horner
6e7d83e79d Merge branch 'bl808/pinctrl-hwrng' into bl808/all 2023-03-09 21:20:12 +00:00
Alexander Horner
4f1fdc7c68 Merge branch 'bl808/mailbox' into bl808/all 2023-03-09 21:20:05 +00:00
Alexander Horner
c4adc8d331 Merge branch 'bl808/emac' into bl808/all 2023-03-09 21:19:55 +00:00
Alexander Horner
ab66f49c1c Add GPIO/PINCTRL and HWRNG/Crypto drivers 2023-03-05 15:43:05 -05:00
Alexander Horner
b9595ae860 Add GPIO/PINCTRL and HWRNG/Crypto drivers 2023-03-05 15:42:28 -05:00
Allen Martin
7a87990017 net: ethoc: reduce RGMII interface clk to 1MHz 
PHY communication was not stable at 2.5MHz, so reduce down to 1MHz.
 2023-03-05 15:38:29 -05:00
Allen Martin
1c4745d4e3 net: ethoc: reverse the interrupt mask bits 
The bl808 EMAC INT_MASK register has reversed polarity, so flip
all the bits in it everwhere it is used.
 2023-03-05 15:38:22 -05:00
Allen Martin
21ef01e1b8 net: ethoc: add bl808 specific ethoc bits 
Add MODER RGMII bit to configure MII/RGMII PHY interface.
Add TX_BD_EOF End of Frame interrupt status bit.

These were taken from smaeul's u-boot:
d19d78603e
 2023-03-05 15:38:04 -05:00
Allen Martin
8141c2e564 ehci: rearrange registers to match bl808 
bl808 does not follow the EHCI spec, rearrange the registers
to match what they actually implemented
 2023-03-05 15:36:40 -05:00
Allen Martin
5f57cf035a mmc: sdhci-bflb: remove unnecessary quirks 
Remove quirks that were added during bringup but are not required.
This will enable DMA and ADMA on sdcard.
 2023-03-05 15:15:35 -05:00
Allen Martin
e944b126eb tty: serial: bflb_uart: fix leaked ISR registration 
-call devm_free_irq() in shutdown to release ISR registered in
 startup.
-change many functions to take driver private bflb_uart_port *
 instead of serial_core uart_port *
-add to_bflb_uart_port() to assist with above
-switch to using uart_port_tx_limited() serial_core helper
 which is the preferred way to do transmission instead of
 accessing serial_core xmit buffer directly
 2023-03-05 15:15:16 -05:00
Justin Hammond
f83ddcbbd9 Rename DTS Files 2023-03-05 15:14:41 -05:00
Justin Hammond
2e8977e82f Rename DTS Files 2023-03-05 15:13:57 -05:00
Justin Hammond
eb37752176 Rename DTS Files 2023-03-05 15:12:51 -05:00
Allen Martin
d28e6970c5 sdhci-bflb: enable additional quirks 
Write protect polarity is confirmed backwards, the other quirks
may not be needed.
 2023-03-05 15:10:41 -05:00
Allen Martin
de3ed97b31 disable card detection/dma/cap clock quirks 2023-03-05 15:10:18 -05:00
Allen Martin
226ae45e5f WIP: sdhci: add BFLB sdhci driver 2023-03-05 15:09:48 -05:00
Allen Martin
31e8d58250 WIP: add BFLB MBOX interrupt controller driver 2023-03-05 15:09:06 -05:00
Jisheng Zhang
6d91402cf4 MAINTAINERS: add myself as a reviewer for Bouffalolab uart driver 
I want to maintain this Bouffalolab uart driver from now on.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
 2023-03-05 15:07:00 -05:00
Jisheng Zhang
9a3c861dbb serial: bflb_uart: add Bouffalolab UART Driver 
Add the driver for Bouffalolab UART IP which is found in Bouffalolab
SoCs such as bl808.

UART driver probe will create path named "/dev/ttySx".

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
 2023-03-05 15:06:52 -05:00
Alexander Horner
5bc30359db Bring M1s device tree up to date with Ox64's changes, fix compatible string on the Ox64 device tree 2023-03-05 15:05:52 -05:00
Alexander Horner
56820fe331 Update bl808_defconfig for new drivers 2023-03-05 15:05:36 -05:00
Alexander Horner
4fb0219648 Update device trees for new GPIO and HWRNG drivers 2023-03-05 15:05:20 -05:00
Justin Hammond
b79eef5b82 Tabstops are 8 chars, not 4 2023-03-05 15:05:03 -05:00
Justin Hammond
d48d4b1210 Add timer node for OpenSBI 1.2 compatibility 2023-03-05 15:04:28 -05:00
Allen Martin
be296b4862 riscv: dts: bflb: ox64: Fix address/size-cells 
The number of address cells needed here (one) does not match the
implicitly-defined default number of cells.

Signed-off-by: Allen Martin <armartin@gmail.com>
 2023-03-05 15:04:11 -05:00
Samuel Holland
ee0931def8 riscv: dts: bflb: m1s: Fix address/size-cells 
The number of address cells needed here (one) does not match the
implicitly-defined default number of cells.

Signed-off-by: Samuel Holland <samuel@sholland.org>
 2023-03-05 15:03:55 -05:00
Allen Martin
a7bbe72dd5 dts: bl808: enable enet nodes 2023-03-05 15:03:43 -05:00
Allen Martin
2ad217b409 riscv: bl808_defconfig: enable ETHOC driver 2023-03-05 15:03:00 -05:00
Allen Martin
92d66e03a0 dts: bl808: add entry for EMAC device 
Add device-tree node for EMAC ethernet device and fake clock
node to represent 50MHz clock to the device.  Add a virtualized
interrupt bit for forwareded EMAC interrupts.
 2023-03-05 15:02:06 -05:00
Allen Martin
37884166bc dts: bl808-pine64-ox64: disable secondary UART 
Pinmux for this device conflicts with EMAC, so disable it until
pinmux is changed to some other pins.
 2023-03-05 15:01:53 -05:00
Allen Martin
5de1031490 dts: bl808-pine64-ox64: change rootfs to /dev/mmcblk0p2 2023-03-05 15:01:02 -05:00
Justin Hammond
dcecd699e7 Rename DTS Files 2023-03-05 15:00:23 -05:00
Allen Martin
3258905a37 bl808_defconfig: enable USB serial and network devices 2023-03-05 14:59:10 -05:00
Allen Martin
aa9ca42882 dts: bl808: fix offset of ehci controller 
ehci controller registers are at address 0x20072000 not 0x20072010
 2023-03-05 14:58:48 -05:00
Allen Martin
0a7184765d bl808_defconfig: enable USB and EHCI 2023-03-05 14:58:36 -05:00
Allen Martin
4c45c424d0 usb: add bflb ehci controller 2023-03-05 14:58:20 -05:00
Alexander Horner
b2fe2832f8 Update defconfig with EXT4 support for SD rootfs 2023-03-05 14:58:06 -05:00
Alexander Horner
ad398a4933 Disable flash rootfs for now, edit bootargs to use SDHCI ext4 partition 1 rootfs 2023-03-05 14:57:48 -05:00
Allen Martin
9a54e5b68a dts: bl808: add fake sdh clock at 96MHz 2023-03-05 14:57:22 -05:00
Alexander Horner
885fc70c6a UART2 working under Linux! 2023-03-05 14:56:53 -05:00