mirror of https://github.com/Fishwaldo/meta-riscv.git synced 2025-03-17 04:21:27 +00:00

Moritz Fischer 0473a5ba80 README: Add paragraph on how to use wic images

Add a paragraph on how to use the wic images to run on hardware

Suggested-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>

2018-04-10 22:12:26 -07:00

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meta-riscv

RISC-V Architecture Layer for OpenEmbedded/Yocto

Description

This is the general hardware specific BSP overlay for the RISC-V based devices.

More information can be found at: https://riscv.org/ (Official Site)

The core BSP part of meta-riscv should work with different OpenEmbedded/Yocto distributions and layer stacks, such as:

Distro-less (only with OE-Core).
Angstrom.
Yocto/Poky (main focus of testing).

Dependencies

This layer depends on:

URI: git://github.com/openembedded/openembedded-core
- branch: master
- revision: HEAD
URI: git://github.com/openembedded/bitbake
- branch: master
- revision: HEAD

Quick Start

Note: You only need this if you do not have an existing Yocto Project build environment.

Make sure to install the repo command by Google first.

Create workspace

mkdir riscv-yocto
repo init -u git://github.com/riscv/meta-riscv  -b master -m tools/manifests/riscv-yocto.xml
repo sync
repo start work --all

Setup Build Environment

. ./meta-riscv/setup.sh

Build Image

bitbake core-image-full-cmdline

Run in QEMU

runqemu nographic

Running wic.gz image on hardware

The output of the build will be a <image>.wic.gz file. You can write this file to an sd card using:

$ zcat <image>-<machine>.wic.gz | sudo dd of=/dev/sdX bs=4M iflag=fullblock
oflag=direct conv=fsync status=progress

Maintainer(s)

Khem Raj <raj dot khem at gmail.com>

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