platform: generic: thead: separate implement of T-HEAD c9xx errata

Separate the implement of T-HEAD c9xx errata to allow any platform
with bug related to c9xx cores can use it.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>

platform/generic/Kconfig

@@ -55,6 +55,7 @@ config PLATFORM_STARFIVE_JH7110
 
 config PLATFORM_THEAD
 	bool "THEAD C9xx support"
+	select THEAD_C9XX_ERRATA
 	default n
 
 source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"

platform/generic/include/thead/c9xx_errata.h

@@ -0,0 +1,13 @@
+
+#ifndef __RISCV_THEAD_C9XX_ERRATA_H____
+#define __RISCV_THEAD_C9XX_ERRATA_H____
+
+/**
+ * T-HEAD board with this quirk need to execute sfence.vma to flush
+ * stale entrie avoid incorrect memory access.
+ */
+#define THEAD_QUIRK_ERRATA_TLB_FLUSH		BIT(0)
+
+void thead_register_tlb_flush_trap_handler(void);
+
+#endif // __RISCV_THEAD_C9XX_ERRATA_H____

platform/generic/thead/Kconfig

@@ -3,3 +3,7 @@
 config THEAD_C9XX_PMU
 	bool "T-HEAD c9xx M-mode PMU support"
 	default n
+
+config THEAD_C9XX_ERRATA
+	bool "T-HEAD c9xx errata support"
+	default n

platform/generic/thead/objects.mk

@@ -7,6 +7,8 @@
 
 platform-objs-$(CONFIG_THEAD_C9XX_PMU) += thead/thead_c9xx_pmu.o
 
+platform-objs-$(CONFIG_THEAD_C9XX_ERRATA) += thead/thead_c9xx_tlb_trap_handler.o
+platform-objs-$(CONFIG_THEAD_C9XX_ERRATA) += thead/thead_c9xx_errata_tlb_flush.o
+
 carray-platform_override_modules-$(CONFIG_PLATFORM_THEAD) += thead_generic
 platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-generic.o
-platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-trap-handler.o

platform/generic/thead/thead-generic.c

@@ -7,40 +7,34 @@
  */
 
 #include <platform_override.h>
-#include <sbi/riscv_barrier.h>
+#include <thead/c9xx_errata.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-/**
- * T-HEAD board with this quirk need to execute sfence.vma to flush
- * stale entrie avoid incorrect memory access.
- */
-#define THEAD_QUIRK_TLB_FLUSH_FIXUP		BIT(0)
-
-void _thead_tlb_flush_fixup_trap_handler(void);
-
-void thead_register_tlb_flush_trap_handler(void)
-{
-	csr_write(CSR_MTVEC, &_thead_tlb_flush_fixup_trap_handler);
-}
+struct thead_generic_quirks {
+	u64	errata;
+};
 
 static int thead_generic_early_init(bool cold_boot,
 				    const struct fdt_match *match)
 {
-	unsigned long quirks = (unsigned long)match->data;
+	struct thead_generic_quirks *quirks = (void *)match->data;
 
-	if (quirks & THEAD_QUIRK_TLB_FLUSH_FIXUP)
+	if (quirks->errata & THEAD_QUIRK_ERRATA_TLB_FLUSH)
 		thead_register_tlb_flush_trap_handler();
 
 	return 0;
 }
 
+static struct thead_generic_quirks thead_th1520_quirks = {
+	.errata = THEAD_QUIRK_ERRATA_TLB_FLUSH,
+};
+
 static const struct fdt_match thead_generic_match[] = {
-	{ .compatible = "thead,th1520",
-	  .data = (void*)THEAD_QUIRK_TLB_FLUSH_FIXUP },
+	{ .compatible = "thead,th1520", .data = &thead_th1520_quirks },
 	{ },
 };
 

platform/generic/thead/thead_c9xx_errata_tlb_flush.c

@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_asm.h>
+
+void _thead_tlb_flush_fixup_trap_handler(void);
+
+void thead_register_tlb_flush_trap_handler(void)
+{
+	csr_write(CSR_MTVEC, &_thead_tlb_flush_fixup_trap_handler);
+}